MAC7200 datasheet(446/976 Pages) FREESCALE

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PFLASH Application Usage

MAC7200 Microcontroller Family Reference Manual, Rev. 2

368

Freescale Semiconductor

The PFDACC register may be locked (i.e., writes are not allowed) by clearing PFCR2[21].

18.7.4.2

Flash MCM Registers

These registers are located within the Peripheral Bus space of the MCM (at $FC04 0000), and include the

Write ACCess protection for the main array.

18.7.4.2.1

PFWACC - PFLASH Write ACCess

The PFWACC register contains the WACC for the main array. There is no corresponding functionality for

the Shadow Block.

The PFWACC register may not be locked.

18.7.5

Flash Access Protection

Access Protection refers to the ability to block accesses of a defined type (i.e., read vs. write, user vs.

supervisor, instruction vs. data) on a section of Flash memory.

The Shadow Block has two types of access protection (mapping is shown in

Table 18-8):

Bits

Function

Reseta

a. The reset value is determined by the state of the Flash. The reset values shown are for a

fully erased Shadow Block.

[31:0]

DACC - Main Array Data/Instruction Access

0 = Data only allowed

1 = Data or Instruction allowed

$ffff ffff

Table 18-6. MCM Block Flash Registers

Function

Reset Value

MUDCR

PFWACC (Write ACCess Protection)

$0000 0000

Bits

Function

Reset

[31:0]

WACC - Main Array Write Access

0 = Writes allowed

1 = Writes not allowed

$0000 0000

Table 18-7. Flash Shadow Block Access Protection Types

Field

Definition

SHSACC 0 Supervisor mode only

1 Supervisor and User mode allowed

SHDACC 0 Data fetch only

1 Instruction and Data fetch allowed

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