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MAC7200 Datasheet(PDF) 524 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 524 Page - Freescale Semiconductor, Inc

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Memory Map/Register Definition
MAC7200 Microcontroller Family Reference Manual, Rev. 2
446
Freescale Semiconductor
24.3
Memory Map/Register Definition
The CRG contains the registers and associated bits for controlling and monitoring the oscillator module.
24.4
Functional Description
The OSC_ALC_HIP7A module has control circuitry to maintain the crystal oscillator circuit voltage level
to an optimal level which is determined by the amount of hysteresis being used and the maximum
oscillation range.
The oscillator block has two external pins, EXTAL and XTAL. The oscillator input pin, EXTAL, is
intended to be connected to either a crystal or an external clock source. The selection of ALC oscillator
mode or external clock depends on the XCLKS signal which is sampled during reset. The XTAL pin is an
output signal that provides crystal circuit feedback.
A buffered EXTAL signal becomes the internal clock. To improve noise immunity, the oscillator is
powered by the VDDPLL and VSSPLL power supply pins.
24.4.1
Gain control
A closed loop control system will be utilized whereby the amplifier is modulated to keep the output
waveform sinusoidal and to limit the oscillation amplitude. The output peak to peak voltage will be kept
above twice the maximum hysteresis level of the input buffer. Electrical specification details are provided
in Section A.8, “Oscillator Characteristics”.
24.4.2
Clock Monitor
The clock monitor circuit is based on an internal RC time delay so that it can operate without any MCU
clocks. If no OSCCLK edges are detected within this RC time delay, the clock monitor indicates failure
which asserts self clock mode or generates a system reset depending on the state of SCME bit. If the clock
monitor is disabled or the presence of clocks is detected no failure is indicated.The clock monitor function
is enabled/disabled by the CME control bit, described in Section Chapter 23, “Clock and Reset Generator
(CRG).
24.4.3
Doze Mode Operation
When the system is in Doze Mode, the oscillator operates as normal.
Table 24-1. Clock Selection Based on XCLKS
XCLKS
Description
0
External Clock Mode (External 3.3V clock required)
1
ALC Mode (Internal oscillator clock)



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