MAC7200 datasheet(528/976 Pages) FREESCALE

528 / 976 page

External Signal Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

450

Freescale Semiconductor

25.2

External Signal Description

There are no SSM signals that drive or are driven from MCU pins.

25.3

Memory Map/Register Definition

This section provides a detailed description of all memory-mapped registers in the SSM.

Table 25-1 shows the memory map for the SSM. Note that all addresses are offsets; the absolute address

may be calculated by adding the specified offset to the base address of the SSM.

All registers are accessible via 8-bit, 16-bit or 32-bit accesses. However, 16-bit accesses must be aligned

to 16-bit boundaries, and 32-bit accesses must be aligned to 32-bit boundaries. As an example, the

STATUS register is accessible by a 16-bit READ/WRITE to address ’Base + 0x0002’, but performing a

16-bit access to ’Base + 0x0003’ is illegal.

25.3.1

The following memory-mapped registers are available in the SSM. Those bits that are shaded out are

read-only, meaning that writes to that bit will have no effect. Those bits that are shaded out and marked

rsvd are reserved for future use. To optimize future compatibility, these bits should be masked out during

any read/write operations to avoid conflict with future implementations.

25.3.1.1

System Status Register

The System Status register is a read-only register that reflects the current state of the system.

Table 25-1. Module Memory Map

Address

Size

Access

Mode1

1. U = User Mode, S = Supervisor Mode, A = All (No restrictions)

Base + 0x0000

Reserved

16 bits

Reads/Writes have no effect.

Base + 0x0002

System Status (STATUS)

16 bits

Base + 0x0004

System Memory Configuration (MEMCONFIG)

16 bits

Base + 0x0006

Debug Status Port (DEBUGPORT)

16 bits

R/W

Base + 0x0008

Error Configuration (ERROR)

16 bits

R/W

Base + 0x000A

Reserved

16 bits

Reads/Writes have no effect.

Base + 0x000C

System Reset (SYSRESET)

16 bits

R/W

Base + 0x000E

Reserved

16 bits

Reads/Writes have no effect.

Base + 0x0010

Base + 0x3FFF

Reserved

See Note 2

2. If enabled at the SoC level, accessing these register addresses will cause bus aborts.

MAC7200 Datasheet(PDF) 528 Page - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 528 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL