MAC7200 datasheet(530/976 Pages) FREESCALE

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Memory Map/Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

452

Freescale Semiconductor

25.3.1.2

System Memory Configuration Register

The System Memory Configuration register is a read-only register that reflects the memory configuration

of the system.

DMAIDLE

DMA Is Idle. This bit reflects the current status of the DMA. It is primarily used for debug purposes.

1 The DMA is idle

0 The DMA is performing a bus read or write

3–0

DMAACT

Active DMA Channel. This field identifies which DMA channel, if any, is currently active (i.e. executing bus

transactions). Note that this value is only valid if DMAIDLE = 0. These bits are primarily used for debug purposes.

0x0 Channel 0 active

0x1 Channel 1 active

0x2 Channel 2 active

0x3 Channel 3 active

0x4 Channel 4 active

0x5 Channel 5 active

0x6 Channel 6 active

0x7 Channel 7 active

0x8 Channel 8 active

0x9 Channel 9 active

0xA Channel 10 active

0xB Channel 11 active

0xC Channel 12 active

0xD Channel 13 active

0xE Channel 14 active

0xF Channel 15 active

Address Refer to Table 25-1

Access: Refer to Table 25-5

9876543210

SRAMSIZE

IFLASHSIZE

DFLASHSIZE

RESET:

101111010110100

= Writes have no effect on this bit

rsvd

= Reserved for future use

Figure 25-3. System Memory Configuration (MEMCONFIG) Register

Table 25-3. STATUS Field Descriptions (Continued)

Field

Description

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