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MAC7200 Datasheet(PDF) 550 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 550 Page - Freescale Semiconductor, Inc |
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550 / 976 page ![]() Memory Map and Register Description MAC7200 Microcontroller Family Reference Manual, Rev. 2 472 Freescale Semiconductor 26.8.2.5 PIT Interrupt/DMA Select Registers (PITINTSEL) This register decides whether a channel generates an interrupt or is used for DMA triggering. Address Offset: 0x104 Access: User read/write 31 30 29 28 27 26 25 24 R 0 0000000 W Reset 0 0000000 23 22 21 20 19 18 17 16 R 0 0000000 W Reset 0 0000000 15 14 13 12 11 10 9 8 R 0 0000000 W Reset 0 0000000 7 6543210 R0 0 0 TIE4 TIE3 TIE2 TIE1 RTIE W Reset 0 0000000 Figure 26-7. PIT Interrupt Enable Register (PITINTEN) Table 26-10. PITINTEN Field Descriptions Field Description 31–5 Reserved, should be cleared. 4–1 TIEn Timer Interrupt Enable Bit. 0 Interrupt requests from Timer x are disabled 1 Interrupt will be requested whenever TIFx is set When an interrupt is pending (TIF/RTIF set), enabling the interrupt will immediately cause an interrupt event. To avoid this, the associated TIF/RTIF flag must be cleared first. 0 RTIE Real Time Interrupt Enable Bit. 0 Interrupt requests from RTI are disabled 1 Interrupt will be requested whenever RTIF is set |
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