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MAC7200 Datasheet(PDF) 552 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 552 Page - Freescale Semiconductor, Inc |
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552 / 976 page ![]() Memory Map and Register Description MAC7200 Microcontroller Family Reference Manual, Rev. 2 474 Freescale Semiconductor 26.8.2.7 PIT Control Register (PITCTRL) This register controls whether the clock for the timers 1-10 is enabled. The RTI timer (timer 0) runs on a separate clock which is controlled by the CRG. Address Offset: 0x10C Access: User read/write 31 30 29 28 27 26 25 24 R 00000 000 W Reset 00000 000 23 22 21 20 19 18 17 16 R 00000 000 W Reset 00000 000 15 14 13 12 11 10 9 8 R 00000 PEN10 PEN9 PEN8 W Reset 00000 000 7 6543210 R PEN7 PEN6 PEN5 PEN4 PEN3 PEN2 PEN1 PEN0 W Reset 00000 000 Figure 26-9. PIT Timer Enable Register (PITEN) Table 26-12. PITEN Field Descriptions Field Description 31–11 Reserved, should be cleared. 10–0 PENn Timer Enable Bit. 0 Timer will be disabled 1 Timer will be active |
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