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MAC7200 Datasheet(PDF) 629 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 629 Page - Freescale Semiconductor, Inc |
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629 / 976 page ![]() Memory Map/Register Definition MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 551 Table 29-3. IBFD Field Descriptions Field Description 7–0 IBC I-Bus Clock Rate. This field is used to prescale the clock for bit rate selection. The bit clock generator is implemented as a prescale divider. The IBC bits are decoded to give the Tap and Prescale values as follows: 7–6 select the prescaled shift register (see Table 29-4) 5–3 select the prescaler divider (see Table 29-5) 2–0 select the shift register tap point (see Table 29-6) Table 29-4. I-Bus Multiplier Factor IBC7 –6MUL 00 01 01 02 10 04 11 RESERVED Table 29-5. I-Bus Prescaler Divider Values IBC5 –3 scl2start (clocks) scl2stop (clocks) scl2tap (clocks) tap2tap (clocks) 000 2741 001 2742 010 2964 011 6968 100 14171416 101 30333032 110 62656264 111 126 129 126 128 Table 29-6. I-Bus Tap and Prescale Values IBC2-0 SCL Tap (clocks) SDA Tap (clocks) 000 5 1 001 6 1 010 7 2 011 8 2 100 9 3 101 10 3 |
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