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MAC7200 Datasheet(PDF) 642 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 642 Page - Freescale Semiconductor, Inc |
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642 / 976 page ![]() Functional Description MAC7200 Microcontroller Family Reference Manual, Rev. 2 564 Freescale Semiconductor 29.6.2.8 Handshaking The clock synchronization mechanism can be used as a handshake in data transfer. Slave devices may hold the SCL low after completion of one byte transfer (9 bits). In such cases, it halts the bus clock and forces the master clock into wait state until the slave releases the SCL line. 29.6.2.9 Clock Stretching The clock synchronization mechanism can be used by slaves to slow down the bit rate of a transfer. After the master has driven SCL low, the slave can drive SCL low for the required period and then release it. If the slave SCL low period is greater than the master SCL low period then the resulting SCL bus signal low period is stretched. 29.6.3 Interrupts 29.6.3.1 General The I2C_DMA uses only one interrupt vector. 29.6.3.2 Interrupt Description There are five types of internal interrupts in the I2C. The interrupt service routine can determine the interrupt type by reading the Status Register. I2C Interrupt can be generated on • Arbitration Lost condition (IBAL bit set) • Byte Transfer condition (TCF bit set and DMAEN bit not set) • Address Detect condition (IAAS bit set) • No Acknowledge from slave received when expected • Bus Going Idle (IBB bit not set) The I2C interrupt is enabled by the IBIE bit in the I2C Control Register. It must be cleared by writing ‘1’ to the IBIF bit in the interrupt service routine. The Bus Going Idle interrupt needs to be additionaly enabled by the BIIE bit in the IBIC register. Table 29-11. Interrupt Summary Interrupt Offset Vector Priority Source Description I2C Interrupt ——— IBAL, TCF, IAAS, IBB bits in IBSR register When any of IBAL, TCF or IAAS bits is set an interrupt may be caused based on Arbitration lost, Transfer Complete or Address Detect conditions. If enabled by BIIE, the deassertion of IBB can also cause an interrupt, indicating that the bus is idle. |
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