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MAC7200 Datasheet(PDF) 639 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 639 Page - Freescale Semiconductor, Inc |
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639 / 976 page ![]() Functional Description MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 561 Figure 29-12. I2C Bus Transmission Signals 29.6.2.1 START Signal When the bus is free, i.e. no master device is engaging the bus (both SCL and SDA lines are at logical high), a master may initiate communication by sending a START signal. As shown in Figure 29-12, a START signal is defined as a high-to-low transition of SDA while SCL is high. This signal denotes the beginning of a new data transfer (each data transfer may contain several bytes of data) and brings all slaves out of their idle states. Figure 29-13. Start and Stop conditions SCL SDA Start Signal Ack Bit 123 4567 8 MSB LSB 123 4567 8 MSB LSB Stop Signal No SCL SDA 123 456 7 8 MSB LSB 1 2 5 678 MSB LSB Repeated 34 9 9 AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W XXX D7 D6 D5 D4 D3 D2 D1 D0 Calling Address Read/ Data Byte AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W New Calling Address 99 XX Ack Bit Write Start Signal Start Signal Ack Bit Calling Address Read/ Write Stop Signal No Ack Bit Read/ Write SDA SCL START condition STOP condition |
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