MAC7200 datasheet(649/976 Pages) FREESCALE

649 / 976 page

Initialization/Application Information

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

571

Figure 29-17. Flow-Chart of DMA Mode Master Receive

29.7.2.3

Exiting DMA Mode, System Requirement Considerations

As described above, the final transfers of both TX and RX transfers need to be handled via interrupt by the

CPU. To change from DMA to interrupt driven transfers in the I2C module, you have to disable the

DMAEN bit in the IBCR register. The trigger to exit the DMA mode is that the programmed DMA

Transfer Control Descriptor (TCD) has completed all its transfers to/from the I2C module.

Config I2C for

Master TX

interrupt

generated

Arb Lost or

No ack ?

CPU handles

condition

yes

CPU sets TX/RX

to RX

CPU: dummy

CPU sets

DMAENABLE

read of DATAreg

DMA reads byte

ipd_rx_req

generated

of data

Slave TX one

byte of data

DMA read

data ?

(n-2) bytes of

yes

CPU clears

DMA enable

Slave TX n-1

data byte

interrupt

generated

CPU reads n-1

data

CPU sets

TXACK

Slave TX last

data byte

interrupt

generated

CPU reads last

data byte

Stop

generated

Start

Generated

CPU writes calling

address to slave

MAC7200 Datasheet(PDF) 649 Page - Freescale Semiconductor, Inc

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