MAC7200 datasheet(881/976 Pages) FREESCALE

881 / 976 page

External Signal Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

803

NOTES

34.2.1

Port A

This port implements 16 GPIO/Peripheral pins. All 16-bits are controllable as GPIO, and the port is

controlled as follows:

•

PA0-PA15: Switched by the MODE bits in Port A of the PIM

•

Refer to the PIM Block Guide for the Peripheral Mode functionality of this port

The GPIO registers for this port reside at an offset of $0000 in the PIM memory map slot.

34.2.2

Port B

This port implements 16 GPIO/Peripheral pins. All 16-bits are controllable as GPIO, and the port is

controlled as follows:

•

PB0-PB15: Switched by the MODE bits in Port B of the PIM

•

Refer to the PIM Block Guide for the Peripheral Mode functionality of this port

The GPIO registers for this port reside at an offset of $0040 in the PIM memory map slot.

34.2.3

Port C

This port implements 16 GPIO/Peripheral pins. All 16-bits are controllable as GPIO, and the port is

controlled as follows:

•

PC0-PC15: Switched by the MODE bits in Port C of the PIM

•

Refer to the PIM Block Guide for the Peripheral Mode functionality of this port

The GPIO registers for this port reside at an offset of $0080 in the PIM memory map slot.

Table 34-7. JTAG Pin Functions (Peripheral Mode)

Port

Primary Peripheral

Function 1

1. The JTAG interface has pull-ups/pull-downs enabled at reset, as follows:

TCK: Pull-down

TMS, TDI: Pull-up

TDO: None

Secondary Peripheral

Function

Tertiary Peripheral

Function

TCK

JTAG Interface TCK

None

TMS

JTAG Interface TMS

None

TDI

JTAG Interface TDI

None

TDO

JTAG Interface TDO

None

MAC7200 Datasheet(PDF) 881 Page - Freescale Semiconductor, Inc

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