MAC7200 datasheet(884/976 Pages) FREESCALE

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PIM Application Usage

MAC7200 Microcontroller Family Reference Manual, Rev. 2

806

Freescale Semiconductor

34.5.2

Using Single Pins in a Port

There is no limitation on using single pins in a port. Any combination of GPI, GPO and Peripheral Modes

may be used in a port. It is even possible to use pins in GPI or GPO mode to mimic slower rate peripheral

protocols manually.

34.5.3

Pin versus Port Registers

Table 34-9 summarizes the PIM registers, showing which registers are intended for pin access, which

registers are intended for port-wide access, and which registers are intended for double port-wide (32 pins)

access.

34.5.4

Peripheral Muxing

Figure 34-2 shows an overview of the four levels of functional muxing available on most pins:

•

GPIO (with optional interrupt capability)

•

Primary Peripheral (#1)

•

Secondary Peripheral (#2)

•

Tertiary Peripheral (#3)

Please refer to the PIM Block Guide for a full explanation of using the mode selection for each pin, and

for a complete listing of the functionality of each pin in Primary, Secondary and Tertiary peripheral modes.

Table 34-9. PIM Registers

Addr

Offset

Read/

Write

Port

Dbl

Port

Name

Function

$000

$01E

CONFIGxx

R/W

Pin Config

Configures a single pin

MODE[1:0] - Peripheral/GPIO Mode

DDR - Data Direction

ODER - Open Drain Enable

SLEWDIS/SLEW - Slew Rate

PULL[1:0] - Pull-up/Pull-down

PIER - Interrupt Enable

PIFR - Interrupt Flag

$020

PORTIFR

Port Wide

Interrupt Flag

Read-only port-wide mirror of the PIFR

bits from each CONFIGxx register

$024

PORTDATA

R/W

Port Wide Data

Port-wide Data Read/Data Write

$026

PORTIR

Port Wide Input

The value currently driven on the port

$028

$037

PINDATAxx

R/W

Pin Data

Pin-wide mirror of the PORTDATA

numbers of pins on a port, especially using

a DMA.

$3e0

PORT32IR

Double Port

Wide Input

Combines two PORTIR registers into a

single 32-bit wide register.

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