MAC7200 datasheet(886/976 Pages) FREESCALE

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Memory Map and Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

808

Freescale Semiconductor

34.6

Memory Map and Register Definition

This section provides a detailed description of all memory-mapped registers in the Port Integration

Module.

Table 34-11 shows the memory map for the Port Integration Module. Note that all addresses are offsets;

the absolute address may be computed by adding the specified offset to the base address of the Port

Integration Module.

NOTE

Not all Ports are available on all packages.

Table 34-10. Port Integration Module Memory Map Overview

Address

Port

Base + 0x0000

Port A

Base + 0x0040

Port B

Base + 0x0080

Port C

Base + 0x00C0

Port D

Base + 0x0100

Port E

Base + 0x0140

Port F

Base + 0x0180

Port G

Base + 0x01C0 – Base + 0x03BF

Reserved 1

1. Registers are marked as reserved. If enabled at the SoC level,

accessing these registers will cause bus aborts. Refer to the System

Services Module documentation for more details.

Base + 0x03C0

Global Interrupt Status

Base + 0x03C2

PIM Configuration

Base + 0x03C4

TDI Pad Control

Base + 0x03C6

TDO Pad Control

Base + 0x03C8

TMS Pad Control

Base + 0x03CA

TCK Pad Control

Base + 0x03CC

Reserved

Base + 0x03CE

RESET Pad Control

Base + 0x03D0 – Base + 0x03DF

Reserved1

Base + 0x03E0 – Base + 0x03FF

PORT32IR Registers

Base + 0x0400 – Base + 0x3FFF

Reserved1

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