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MAC7200 Datasheet(PDF) 888 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 888 Page - Freescale Semiconductor, Inc |
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888 / 976 page ![]() Memory Map and Register Definition MAC7200 Microcontroller Family Reference Manual, Rev. 2 810 Freescale Semiconductor Base + 0x040 Port B: Pin 0 Configuration (CONFIG0) 16 R/W A Base + 0x042 Port B: Pin 1 Configuration (CONFIG1) 16 R/W A Base + 0x044 Port B: Pin 2 Configuration (CONFIG2) 16 R/W A Base + 0x046 Port B: Pin 3 Configuration (CONFIG3) 16 R/W A Base + 0x048 Port B: Pin 4 Configuration (CONFIG4) 16 R/W A Base + 0x04A Port B: Pin 5 Configuration (CONFIG5) 16 R/W A Base + 0x04C Port B: Pin 6 Configuration (CONFIG6) 16 R/W A Base + 0x04E Port B: Pin 7 Configuration (CONFIG7) 16 R/W A Base + 0x050 Port B: Pin 8 Configuration (CONFIG8) 16 R/W A Base + 0x052 Port B: Pin 9 Configuration (CONFIG9) 16 R/W A Base + 0x054 Port B: Pin 10 Configuration (CONFIG10) 16 R/W A Base + 0x056 Port B: Pin 11 Configuration (CONFIG11) 16 R/W A Base + 0x058 Port B: Pin 12 Configuration (CONFIG12) 16 R/W A Base + 0x05A Port B: Pin 13 Configuration (CONFIG13) 16 R/W A Base + 0x05C Port B: Pin 14 Configuration (CONFIG14) 16 R/W A Base + 0x05E Port B: Pin 15 Configuration (CONFIG15) 16 R/W A Base + 0x060 Port B: Port Wide Interrupt Flag (PORTIFR) 16 R/W A Base + 0x062 Reserved Writing this register will have no effect. Reading this register will return 0x00 Base + 0x064 Port B: Port Wide Data Read/Write (PORTDATA) 16 R/W A Base + 0x066 Port B: Port Wide Input (PORTIR) 16 R A Base + 0x068 Port B: Pin0 Data Read/Write (PINDATA0) 8 R/W A Base + 0x069 Port B: Pin1 Data Read/Write (PINDATA1) 8 R/W A Base + 0x06A Port B: Pin2 Data Read/Write (PINDATA2) 8 R/W A Base + 0x06B Port B: Pin3 Data Read/Write (PINDATA3) 8 R/W A Base + 0x06C Port B: Pin4 Data Read/Write (PINDATA4) 8 R/W A Base + 0x06D Port B: Pin5 Data Read/Write (PINDATA5) 8 R/W A Base + 0x06E Port B: Pin6 Data Read/Write (PINDATA6) 8 R/W A Base + 0x06F Port B: Pin7 Data Read/Write (PINDATA7) 8 R/W A Base + 0x070 Port B: Pin8 Data Read/Write (PINDATA8) 8 R/W A Base + 0x071 Port B: Pin9 Data Read/Write (PINDATA9) 8 R/W A Base + 0x072 Port B: Pin10 Data Read/Write (PINDATA10) 8 R/W A Base + 0x073 Port B: Pin11 Data Read/Write (PINDATA11) 8 R/W A Base + 0x074 Port B: Pin12 Data Read/Write (PINDATA12) 8 R/W A Base + 0x075 Port B: Pin13 Data Read/Write (PINDATA13) 8 R/W A Base + 0x076 Port B: Pin14 Data Read/Write (PINDATA14) 8 R/W A Base + 0x077 Port B: Pin15 Data Read/Write (PINDATA15) 8 R/W A Base + 0x078 to Base + 0x07F Reserved Writing this register will have no effect. Reading this register will return 0x00 Table 34-11. Port Integration Module Memory Map (Continued) Address Use Size Access Mode 1 |
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