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MAC7200 Datasheet(PDF) 890 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 890 Page - Freescale Semiconductor, Inc

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Memory Map and Register Definition
MAC7200 Microcontroller Family Reference Manual, Rev. 2
812
Freescale Semiconductor
Base + 0x0C0
Port D: Pin 0 Configuration (CONFIG0)
16
R/W
A
Base + 0x0C2
Port D: Pin 1 Configuration (CONFIG1)
16
R/W
A
Base + 0x0C4
Port D: Pin 2 Configuration (CONFIG2)2
16
R/W
A
Base + 0x0C6
Port D: Pin 3 Configuration (CONFIG3)
16
R/W
A
Base + 0x0C8
Port D: Pin 4 Configuration (CONFIG4)
16
R/W
A
Base + 0x0CA
Port D: Pin 5 Configuration (CONFIG5)
16
R/W
A
Base + 0x0CC
Port D: Pin 6 Configuration (CONFIG6)
16
R/W
A
Base + 0x0CE
Port D: Pin 7 Configuration (CONFIG7)
16
R/W
A
Base + 0x0D0
Port D: Pin 8 Configuration (CONFIG8)
16
R/W
A
Base + 0x0D2
Port D: Pin 9 Configuration (CONFIG9)
16
R/W
A
Base + 0x0D4
Port D: Pin 10 Configuration (CONFIG10)
16
R/W
A
Base + 0x0D6
Port D: Pin 11 Configuration (CONFIG11)
16
R/W
A
Base + 0x0D8
Port D: Pin 12 Configuration (CONFIG12)
16
R/W
A
Base + 0x0DA
Port D: Pin 13 Configuration (CONFIG13)
16
R/W
A
Base + 0x0DC
Port D: Pin 14 Configuration (CONFIG14)
16
R/W
A
Base + 0x0DE
Port D: Pin 15 Configuration (CONFIG15)
16
R/W
A
Base + 0x0E0
Port D: Port Wide Interrupt Flag (PORTIFR)
16
R/W
A
Base + 0x0E2
Reserved
Writing this register will have no effect.
Reading this register will return 0x00
Base + 0x0E4
Port D: Port Wide Data Read/Write (PORTDATA)
16
R/W
A
Base + 0x0E6
Port D: Port Wide Input (PORTIR)
16
R
A
Base + 0x0E8
Port D: Pin0 Data Read/Write (PINDATA0)
8
R/W
A
Base + 0x0E9
Port D: Pin1 Data Read/Write (PINDATA1)
8
R/W
A
Base + 0x0EA
Port D: Pin2 Data Read/Write (PINDATA2)
8
R/W
A
Base + 0x0EB
Port D: Pin3 Data Read/Write (PINDATA3)
8
R/W
A
Base + 0x0EC
Port D: Pin4 Data Read/Write (PINDATA4)
8
R/W
A
Base + 0x0ED
Port D: Pin5 Data Read/Write (PINDATA5)
8
R/W
A
Base + 0x0EE
Port D: Pin6 Data Read/Write (PINDATA6)
8
R/W
A
Base + 0x0EF
Port D: Pin7 Data Read/Write (PINDATA7)
8
R/W
A
Base + 0x0F0
Port D: Pin8 Data Read/Write (PINDATA8)
8
R/W
A
Base + 0x0F1
Port D: Pin9 Data Read/Write (PINDATA9)
8
R/W
A
Base + 0x0F2
Port D: Pin10 Data Read/Write (PINDATA10)
8
R/W
A
Base + 0x0F3
Port D: Pin11 Data Read/Write (PINDATA11)
8
R/W
A
Base + 0x0F4
Port D: Pin12 Data Read/Write (PINDATA12)
8
R/W
A
Base + 0x0F5
Port D: Pin13 Data Read/Write (PINDATA13)
8
R/W
A
Base + 0x0F6
Port D: Pin14 Data Read/Write (PINDATA14)
8
R/W
A
Base + 0x0F7
Port D: Pin15 Data Read/Write (PINDATA15)
8
R/W
A
Base + 0x0F8
to
Base + 0x0FF
Reserved
Writing this register will have no effect.
Reading this register will return 0x00
Table 34-11. Port Integration Module Memory Map (Continued)
Address
Use
Size
Access
Mode 1



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