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MAC7200 Datasheet(PDF) 891 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 891 Page - Freescale Semiconductor, Inc

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Memory Map and Register Definition
MAC7200 Microcontroller Family Reference Manual, Rev. 2
Freescale Semiconductor
813
Base + 0x100
Port E: Pin 0 Configuration (CONFIG0)
16
R/W
A
Base + 0x102
Port E: Pin 1 Configuration (CONFIG1)
16
R/W
A
Base + 0x104
Port E: Pin 1 Configuration (CONFIG2)
16
R/W
A
Base + 0x106
Port E: Pin 3 Configuration (CONFIG3)
16
R/W
A
Base + 0x108
Port E: Pin 4 Configuration (CONFIG4)
16
R/W
A
Base + 0x10A
Port E: Pin 5 Configuration (CONFIG5)
16
R/W
A
Base + 0x10C
Port E: Pin 6 Configuration (CONFIG6)
16
R/W
A
Base + 0x10E
Port E: Pin 7 Configuration (CONFIG7)
16
R/W
A
Base + 0x110
Port E: Pin 8 Configuration (CONFIG8)
16
R/W
A
Base + 0x112
Port E: Pin 9 Configuration (CONFIG9)
16
R/W
A
Base + 0x114
Port E: Pin 10 Configuration (CONFIG10)
16
R/W
A
Base + 0x116
Port E: Pin 11 Configuration (CONFIG11)
16
R/W
A
Base + 0x118
Port E: Pin 12 Configuration (CONFIG12)
16
R/W
A
Base + 0x11A
Port E: Pin 13 Configuration (CONFIG13)
16
R/W
A
Base + 0x11C
Port E: Pin 14 Configuration (CONFIG14)
16
R/W
A
Base + 0x11E
Port E: Pin 15 Configuration (CONFIG15)
16
R/W
A
Base + 0x110
Port E: Port Wide Interrupt Flag (PORTIFR)
16
R/W
A
Base + 0x122
Reserved
Writing this register will have no effect.
Reading this register will return 0x00
Base + 0x124
Port E: Port Wide Data Read (PORTDATA)
16
R
A
Base + 0x126
Port E: Port Wide Input (PORTIR)
16
R
A
Base + 0x128
Port E: Pin0 Data Read (PINDATA0)
8
R
A
Base + 0x129
Port E: Pin1 Data Read (PINDATA1)
8
R
A
Base + 0x12A
Port E: Pin2 Data Read (PINDATA2)
8
R
A
Base + 0x12B
Port E: Pin3 Data Read (PINDATA3)
8
R
A
Base + 0x12C
Port E: Pin4 Data Read (PINDATA4)
8
R
A
Base + 0x12D
Port E: Pin5 Data Read (PINDATA5)
8
R
A
Base + 0x12E
Port E: Pin6 Data Read (PINDATA6)
8
R
A
Base + 0x12F
Port E: Pin7 Data Read (PINDATA7)
8
R
A
Base + 0x130
Port E: Pin8 Data Read (PINDATA8)
8
R
A
Base + 0x131
Port E: Pin9 Data Read (PINDATA9)
8
R
A
Base + 0x132
Port E: Pin10 Data Read (PINDATA10)
8
R
A
Base + 0x133
Port E: Pin11 Data Read (PINDATA11)
8
R
A
Base + 0x134
Port E: Pin12 Data Read (PINDATA12)
8
R
A
Base + 0x135
Port E: Pin13 Data Read (PINDATA13)
8
R
A
Base + 0x136
Port E: Pin14 Data Read (PINDATA14)
8
R
A
Base + 0x137
Port E: Pin15 Data Read (PINDATA15)
8
R
A
Base + 0x138
to
Base + 0x13F
Reserved
Writing this register will have no effect.
Reading this register will return 0x00
Table 34-11. Port Integration Module Memory Map (Continued)
Address
Use
Size
Access
Mode 1



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