MAC7200 datasheet(882/976 Pages) FREESCALE

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External Signal Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

804

Freescale Semiconductor

34.2.4

Port D

This port implements 15 GPIO/Peripheral + 1 GPI/Peripheral pins. All 16-bits are controllable as GPIO,

and the port is controlled as follows:

•

PD0-PD15: Switched by the MODE bits in Port D of the PIM

•

PD2: Always an output (CLKOUT) in Peripheral Mode or in GPO Mode (i.e.-same functionality).

PD2 may also be used as a GPI. Refer to Section 17.7.6, “Enabling and Disabling CLKOUT” for

more details. In addition this pin is used to sample XCLKS.

•

Refer to the PIM Block Guide for the Peripheral Mode functionality of this port

The GPIO registers for this port reside at an offset of $00C0 in the PIM memory map slot.

34.2.5

Port E

This port implements 16 GPI/Peripheral pins. All 16-bits are controllable as GPI, and the port is controlled

as follows:

•

PE0-PE15: Switched by the MODE bits in Port E of the PIM

•

Refer to the PIM Block Guide for the Peripheral Mode functionality of this port

•

When in Peripheral Mode, a Port E pin may also be used as an external ATD trigger

•

No GPO functionality is available on this port

The GPI registers for this port reside at an offset of $0100 in the PIM memory map slot.

34.2.6

Port F

This port implements 16 GPIO/Peripheral pins. All 16-bits are controllable as GPIO, and the port is

controlled as follows:

•

PF0-PF15: Switched by the MODE bits in Port F of the PIM

•

Refer to the PIM Block Guide for the Peripheral Mode functionality of this port

The GPIO registers for this port reside at an offset of $0140 in the GPIO memory map slot.

34.2.7

Port G

This port implements 16 GPIO/Peripheral pins. All 16-bits are controllable as GPIO, and the port is

controlled as follows:

•

PG0-PG15: Switched by the MODE bits in Port G of the PIM

•

Refer to the PIM Block Guide for the Peripheral Mode functionality of this port

The GPIO registers for this port reside at an offset of $0180 in the GPIO memory map slot.

The IIC SDA and SCL pins have the following special settings in Peripheral Mode: ODE=1, IBE=1 (i.e.-

The IIC module requires both SDA and SCL to be open-drain with the input Schmidt trigger enabled).

XIRQ and IRQ have the following special settings in Peripheral Mode: OBE=0, ODE=0, DSE=0, PUS=1.

MAC7200 Datasheet(PDF) 882 Page - Freescale Semiconductor, Inc

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