TLC5949PWPR datasheet(36/51 Pages) TI

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TLC5949

SBVS219A – DECEMBER 2012 – REVISED DECEMBER 2012

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LED OPEN DETECTION (LOD)

LOD detects a fault caused by an LED open circuit or a short from OUTn to ground with low resistance by

comparing the OUTn voltage to the LOD detection threshold voltage. If the OUTn voltage is lower than the

threshold voltage (set by the LODVLT bits in the first control data latch) when OUTn is on, that output LOD bit is

set to '1' to indicate an open LED. Otherwise, the LOD bit is set to '0'. LOD data are only valid for outputs that

are programmed to be on during the LOD data read selected by the LATTMG bits in the first control data latch.

LOD data are latched into the LOD data latch when LOD data are read, as selected by LATTMG. LOD data for

outputs programmed to be off at the LOD latch timing are always '0' when IDM is not enabled.

LED SHORT DETECTION (LSD)

LSD data detect a fault caused by a shorted LED by comparing the OUTn voltage to the LSD detection threshold

voltage level set by LSDVLT in the first control data latch. If the OUTn voltage is higher than the programmed

voltage when OUTn is on, the corresponding output LSD bit is set to '1' to indicate a shorted LED. Otherwise, the

LSD bit is set to '0'. LSD data are only valid for outputs that are programmed to be on when the LSD data are

read, as selected by the LATTMG bits in the first control data latch. LSD data are latched into the LSD data latch

when the LSD data are read, as selected by LATTMG. LSD data for outputs programmed to be off at the LSD

latch timing are always '0' when IDM is not enabled.

OUTPUT LEAKAGE DETECTION (OLD)

OLD detects a fault caused by a short with high resistance from OUTn to GND by comparing the OUTn voltage

to the LSD detection threshold voltage when the output is off. A small current is sourced from OUTn to detect

LED leakage. OLD operation can be disabled by the OLDENA bit. Also, OLD is disabled when the invisible

detection mode (IDM) is enabled (see the Invisible Detection Mode section). If the OUTn voltage is lower than

the programmed LSD threshold voltage, the corresponding output OLD bit is set to '1' to indicate a leaking LED.

Otherwise, the OLD bit is set to '0'. The OLD result is valid for disabled outputs only. The OLD data are latched

into the OLD data latch at the end of the display period or when BLANK is changed to '1'. Also, the OLD data are

latched when the GS data are written if the display timing reset is enabled. OLD data always read '0' when the

output GS is not '0', or when OLD is disabled.

INVISIBLE DETECTION MODE (IDM)

IDM can detect LOD and LSD without dependency upon GS data. When the IDM bit in the function control data

latch is set, OUTn starts sinking the current set by the IDMCUR bits in the function control latch at the first

GSCLK; the IDM sink current is turned off at the GSCLK programmed by LATTMG. When the IDM current is

turned off, LOD and LSD data are latched into the LOD and LSD data latch. During the IDM timing, the original

PWM control continues. When the IDM bit in the control data latch is set to '0', the OUTn on/off timing is only

controlled by GS data.

LOD and LSD data are not valid for approximately 1 µs after the constant-current output turns on. Therefore, GS

data must be set to turn on the output for at least 1 µs. Furthermore, the LOD and LSD latch timing bits

(LATTMG) should be set as shown in Equation 4:

The number of GSCLKs required to obtain a valid LOD and LSD = 1 µs / tGSCLK

where:

tGSCLK = one GSCLK period

(4)

If the GSCLK frequency is 33 MHz, the outputs must be on for 33 GSCLK periods or more. Therefore, the

LATTMG bits can only be set to '01', '10', or '11'. If the GSCLK frequency is 2 MHz, the outputs must be on for

two or more GSCLK periods. In this case, the LATTMG bits can be set to any pattern.

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