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TLC5949PWPR Datasheet(PDF) 2 Page - Texas Instruments |
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TLC5949PWPR Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 51 page  TLC5949 SBVS219A – DECEMBER 2012 – REVISED DECEMBER 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE AND ORDERING INFORMATION(1) PRODUCT PACKAGE DESIGNATOR ORDERING NUMBER TRANSPORT MEDIA TLC5949DBQR Tape and Reel DBQ TLC5949DBQ Tube TLC5949 TLC5949PWPR Tape and Reel PWP TLC5949PWP Tube (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range, unless otherwise noted. VALUE MIN MAX UNIT VCC –0.3 +6.0 V SIN, SCLK, LAT, GSCLK, IREF –0.3 VCC + 0.3 V Voltage(2) SOUT –0.3 VCC + 0.3 V OUT0 to OUT15 –0.3 +11 V Current OUT0 to OUT15 +60 mA Operating junction, TJ (max) +150 °C Temperature Storage, Tstg –55 +150 °C Human body model (HBM) 3000 V Electrostatic discharge (ESD) ratings Charged device model (CDM) 2000 V (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltages are with respect to device ground terminal. THERMAL INFORMATION TLC5949 DBQ PWP THERMAL METRIC(1) UNITS (SSOP, QSOP) (HTSSOP) 24 PINS 24 PINS θJA Junction-to-ambient thermal resistance 80.4 39.9 θJCtop Junction-to-case (top) thermal resistance 44.2 23.2 θJB Junction-to-board thermal resistance 33.5 21.5 °C/W ψJT Junction-to-top characterization parameter 8.8 0.6 ψJB Junction-to-board characterization parameter 33.2 21.3 θJCbot Junction-to-case (bottom) thermal resistance N/A 3.8 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 2 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: TLC5949 |
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