ASD1194 datasheet(69/76 Pages) TI

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ADS1194, ADS1196

ADS1198

www.ti.com

SBAS471C

– APRIL 2010 – REVISED NOVEMBER 2011

Changes from Revision A (September 2010) to Revision B

Page

•

Updated Family and Ordering Information table ................................................................................................................... 2

•

Added Digital Filter section to Electrical Characteristics table .............................................................................................. 3

•

Updated test conditions of Internal Reference, Output voltage parameter in Electrical Characteristics table ..................... 4

•

Updated format of Power Dissipation (Analog Supply = 3V) section in the Electrical Characteristics table ........................ 6

•

Changed 3V Power Dissipation, Quiescent channel power test conditions in the Electrical Characteristics table .............. 6

•

Updated format of Power Dissipation (Analog Supply = 5V) section in the Electrical Characteristics table ........................ 6

•

Changed 5V Power Dissipation, Quiescent channel power test conditions in the Electrical Characteristics table .............. 6

•

Changed values of -3dB Bandwidth column of Table 1 ....................................................................................................... 7

•

Changed values of -3dB Bandwidth column of Table 2 ....................................................................................................... 7

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Changed description of VCAP3 in BGA Pin Assignments table ........................................................................................... 9

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Changed CLK row in BGA Pin Assignments table ............................................................................................................... 9

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Changed CLK row of PAG Pin Assignments table ............................................................................................................. 11

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Changed description of VCAP3 in PAG Pin Assignments table ......................................................................................... 11

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Updated and moved Figure 14 ........................................................................................................................................... 16

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Changed description of CHnSET setting in Device Noise Measurements section ............................................................ 18

•

Changed description of (MVDDP

– MVDDN) for channels 1, 2, 5, 6, 7, and 8 in Supply Measurements (MVDDP,

MVDDN) section ................................................................................................................................................................. 19

•

Updated Equation 4 ............................................................................................................................................................ 22

•

Updated Equation 5 ............................................................................................................................................................ 22

•

Updated footnote 1 of Figure 26 ......................................................................................................................................... 24

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Added footnote 1 to Table 6 ............................................................................................................................................... 25

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Added status and GPIO register bit description to Data Retrieval section ......................................................................... 27

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Changed title of Figure 29 .................................................................................................................................................. 28

•

Updated Figure 31 .............................................................................................................................................................. 29

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Updated Figure 32 .............................................................................................................................................................. 30

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Updated Figure 35 .............................................................................................................................................................. 32

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Changed STANDBY: Enter STANDBY Mode description .................................................................................................. 35

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Changed ID register row of Table 10 .................................................................................................................................. 39

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Changed ID: ID Control Register section ........................................................................................................................... 40

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Changed bit descriptions of ID: ID Control Register section .............................................................................................. 40

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Changed description for bits 4 to 1 of PACE: PACE Detect Register section .................................................................... 47

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Updated Figure 42 .............................................................................................................................................................. 51

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Updated Figure 43 .............................................................................................................................................................. 52

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Updated Figure 46 .............................................................................................................................................................. 55

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Updated Figure 49 .............................................................................................................................................................. 57

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Updated Figure 50 and added footnote 2 ........................................................................................................................... 59

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Updated Figure 51 .............................................................................................................................................................. 60

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Updated Figure 52 .............................................................................................................................................................. 60

•

Updated Figure 53 .............................................................................................................................................................. 62

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Added Analog Input Structure section ................................................................................................................................ 64

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