ASD1194 datasheet(27/76 Pages) TI

27 / 76 page

SCLK

DRDY

DOUT

STAT

24-Bit

16-Bit

CH1

CH2

CH3

CH4

CH5

CH6

CH7

CH8

152SCLKs

DIN

ADS1194, ADS1196

ADS1198

www.ti.com

SBAS471C

– APRIL 2010 – REVISED NOVEMBER 2011

Data Output (DOUT)

The data output pin (DOUT) is used with SCLK to read conversion and register data from the ADS1194/6/8. Data

on DOUT are shifted out on the rising edge of SCLK. DOUT goes to a high-impedance state when CS is high. In

read data continuous mode (see the SPI Command Definitions section for more details), the DOUT output line

also indicates when new data are available. This feature can be used to minimize the number of connections

between the device and the system controller. The START signal must be high or the START command must be

issued before retrieving data from the device.

Figure 28 shows the data output protocol for ADS1198.

Figure 28. SPI Bus Data Output for the ADS1198 (8-Channels)

Data Retrieval

Data retrieval can be accomplished in one of two methods. The read data continuous command can be used to

set the device in a mode to read the data continuously without sending opcodes. The read data command can be

used to read just one data output from the device (see the SPI Command Definitions section for more details).

The conversion data are read by shifting the data out on DOUT. The MSB of the data on DOUT is clocked out on

the first SCLK rising edge. DRDY returns to high on the first SCLK falling edge. DIN should remain low for the

entire read operation.

The number of bits in the data output depends on the number of channels and the number of bits per channel.

For the ADS1198, the number of data outputs is (24 status bits + 16 bits

× 8 channels = 152 bits) for all data

rates. The format of the 24 status bits is: (1100 + LOFF_STATP + LOFF_STATN + bits[4:7] of the GPIO

powered down using the user register setting, the corresponding channel output is set to '0'. However, the

sequence of channel outputs remains the same. For the ADS1194 and the ADS1196, the last four and two

channel outputs shown in Figure 28 are zeros. Status and GPIO register bits are loaded into the 24-bit status

word 2tCLKs before DRDY goes low.

The ADS1194/6/8 also provide a multiple readback feature. The data can be read out multiple times by simply

giving more SCLKs, in which case the MSB data byte repeats after reading the last byte. The DAISY_EN bit in

CONFIG1 register must be set to '1' for multiple readbacks.

Submit Documentation Feedback

Product Folder Link(s): ADS1194 ADS1196 ADS1198

ASD1194 Datasheet(PDF) 27 Page - Texas Instruments

ASD1194 Datasheet(HTML) 27 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76

Datasheet Download

Link URL