AMC7812B datasheet(64/92 Pages) TAOS

64 / 92 page

AMC7812B

SBAS625A – SEPTEMBER 2013 – REVISED SEPTEMBER 2013

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ADC-n-Data Registers (Read-Only, Addresses = 23h to 32h)

MSB

LSB

BIT 15

BIT 14

BIT 13

BIT 12

BIT 11

BIT 10

BIT 9

BIT 8

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

A11

A10

Bits[11:0]

ADC data.

Four ADC data registers are available. The ADC-n-data registers (where n = 0 to 15) store the conversion results

of the corresponding analog channel-n, as shown in Table 15.

Table 15. ADC Data Register Definitions

CONVERSION RESULT

INPUT CHANNEL

INPUT TYPE

STORED IN

FORMAT

Channel 0

Single-ended

ADC-0-data register

Straight binary

Channel 1

Single-ended

ADC-1-data register

Straight binary

Channel 2

Single-ended

ADC-2-data register

Straight binary

Channel 3

Single-ended

ADC-3-data register

Straight binary

CH0+ or CH1–

Differential

ADC-0-data register

Twos complement

CH2+ or CH3–

Differential

ADC-2-data register

Twos complement

Channel 4

Single-ended

ADC-4-data register

Straight binary

Channel 5

Single-ended

ADC-5-data register

Straight binary

Channel 6

Single-ended

ADC-6-data register

Straight binary

Channel 7

Single-ended

ADC-7-data register

Straight binary

Channel 8

Single-ended

ADC-8-data register

Straight binary

Channel 9

Single-ended

ADC-9-data register

Straight binary

Channel 10

Single-ended

ADC-10-data register

Straight binary

Channel 11

Single-ended

ADC-11-data register

Straight binary

Channel 12

Single-ended

ADC-12-data register

Straight binary

Channel 13

Single-ended

ADC-13-data register

Straight binary

Channel 14

Single-ended

ADC-14-data register

Straight binary

Channel 15

Single-ended

ADC-15-data register

Straight binary

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