A40MX02 datasheet(28/142 Pages) MICROSEMI

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40MX and 42MX FPGA Families

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R e v i sio n 1 1

Output Drive Characteristics for 3.3 V PCI Signaling

Table 1-19 • DC Specification (3.3 V PCI Signaling)1

PCI

Symbol

Parameter

Condition

Min.

Max.

Min.

Max.

Units

VCCI

Supply Voltage for I/Os

3.0

3.6

3.0

3.6

VIH

Input High Voltage

0.5

VCC + 0.5

0.5

VCCI + 0.3

VIL

Input Low Voltage

–0.5

0.8

–0.3

0.8

IIH

Input High Leakage Current

VIN = 2.7V

µA

IIL

Input Leakage Current

–70

–10

µA

VOH

Output High Voltage

IOUT = –2 mA

0.9

3.3

VOL

Output Low Voltage

IOUT = 3 mA, 6 mA

0.1

0.1 VCCI

CIN

Input Pin Capacitance

CCLK

CLK Pin Capacitance

LPIN

Pin Inductance

< 8 nH3

Notes:

1. PCI Local Bus Specification, Version 2.1, Section 4.2.2.1.

2. Maximum rating for VCCI –0.5V to 7.0V.

3. Dependent upon the chosen package. PCI recommends QFP and BGA packaging to reduce pin inductance and

capacitance.

Table 1-20 • AC Specifications for (3.3 V PCI Signaling)*

PCI

Symbol

Parameter

Condition

Min.

Max.

Min.

Max.

Units

ICL

Low Clamp Current

–5 < VIN

≤ –1

–25 + (VIN +1) /0.015

–60

–10

Slew (r) Output Rise Slew Rate

0.2 V to 0.6 V load

1.8

2.8

V/ns

Slew (f)

Output Fall Slew Rate

0.6 V to 0.2 V load

2.8

4.0

V/ns

Note:

*PCI Local Bus Specification, Version 2.1, Section 4.2.2.2.

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