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A40MX02 Datasheet(PDF) 34 Page - Microsemi Corporation |
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A40MX02 Datasheet(HTML) 34 Page - Microsemi Corporation |
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34 / 142 page  40MX and 42MX FPGA Families 1- 30 R e v i sio n 1 1 Parameter Measurement Figure 1-20 • Output Buffer Delays Figure 1-21 • AC Test Loads Figure 1-22 • Input Buffer Delays To AC test loads (shown below) PAD D E TRIBUFF In 50% PAD 1.5 V 50% 1.5 V E 50% PAD 1.5 V 50% 10% E 50% PAD GND 1.5 V 50% 90% t ENZL t ENLZ t ENZH t ENHZ t DLH t DHL VOL VOH VCCI VOL VOH 35 pF Load 1 (Used to measure propagation delay) To the output under test To the output under test Load 2 (Used to measure rising/falling edges) VCCI GND 35 pF R to VCCI for t PLZ / tPZL R to GND for t PHZ / tPZH R =1 k Ω PAD Y INBUF PAD 3 V 0 V 1.5 V Y GND 50% 1.5 V 50% t INYL t INYH VCCI |
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