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A40MX02 Datasheet(PDF) 20 Page - Microsemi Corporation |
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A40MX02 Datasheet(HTML) 20 Page - Microsemi Corporation |
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20 / 142 page  40MX and 42MX FPGA Families 1- 16 R e v i sio n 1 1 Development Tool Support The MX family of FPGAs is fully supported by Libero® Integrated Design Environment (IDE). Libero IDE is a design management environment, seamlessly integrating design tools while guiding the user through the design flow, managing all design and log files, and passing necessary design data among tools. Libero IDE allows users to integrate both schematic and HDL synthesis into a single flow and verify the entire design in a single environment. Libero IDE includes SynplifyPro from Synopsys, ModelSim® HDL Simulator from Mentor Graphics,® and Viewdraw. Libero IDE includes place-and-route and provides a comprehensive suite of backend support tools for FPGA development, including timing-driven place-and-route, and a world-class integrated static timing analyzer and constraints editor. Additionally, the back-annotation flow is compatible with all the major simulators and the simulation results can be cross-probed with Silicon Explorer II, Microsemi’s integrated verification and logic analysis tool. Another tool included in the Libero software is the SmartGen macro builder, which easily creates popular and commonly used logic functions for implementation into your schematic or HDL design. Microsemi’s Libero software is compatible with the most popular FPGA design entry and verification tools from companies such as Mentor Graphics, Synopsys, and Cadence Design Systems. Refer to the Libero IDE web content at www.microsemi.com/soc/products/software/libero/default.aspx for further information on licensing and current operating system support. Related Documents Application Notes Actel BSDL Files Format Description www.microsemi.com/soc/documents/BSDLformat_AN.pdf Programming Antifuse Devices http://www.microsemi.com/soc/documents/AntifuseProgram_AN.pdf Actel's Implementation of Security in Actel Antifuse FPGAs www.microsemi.com/documents/Antifuse_Security_AN.pdf User’s Guides and Manuals Antifuse Macro Library Guide www.microsemicom/soc/documents/libguide_UG.pdf Silicon Sculptor II www.microsemi.com/soc/techdocs/manuals/default.asp#programmers Miscellaneous Libero IDE Flow Diagram www.microsemi.com/soc/products/tools/libero/flow.html 5.0 V Operating Conditions Table 1-6 • Absolute Maximum Ratings for 40MX Devices* Symbol Parameter Limits Units VCC DC Supply Voltage –0.5 to +7.0 V VI Input Voltage –0.5 to VCC+0.5 V VO Output Voltage –0.5 to VCC+0.5 V |
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