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AM79C976 Datasheet(PDF) 242 Page - Advanced Micro Devices

Part # AM79C976
Description  PCnet-PRO??10/100 Mbps PCI Ethernet Controller
PDF  309 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C976 Datasheet(HTML) 242 Page - Advanced Micro Devices

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242
Am79C976
8/01/00
P R E L I M INARY
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Offset
Bit
Name
Description
031
OWN
This bit indicates whether the descriptor entry is owned by the host (OWN = 0) or by
the Am79C976 controller (OWN = 1). The host sets the OWN bit after filling the buffer
pointed to by the descriptor entry. The Am79C976 controller clears the OWN bit after
transmitting the contents of the buffer. Both the Am79C976 controller and the host
must not alter a descriptor entry after it has relinquished ownership.
0
30
Reserved location
.
0
29
ADD_FCS
ADD_FCS dynamically controls the generation of FCS on a frame by frame basis.
This bit should be set with the ENP bit. However, for backward compatibility, it is
recommended that this bit be set for every descriptor of the intended frame. When
ADD_FCS is set, the state of DXMTFCS is ignored and transmitter FCS generation is
activated. When ADD_FCS is cleared to 0, FCS generation is controlled by
DXMTFCS. When APAD_XMT (CSR4, bit 11) is set to 1, the setting of ADD_FCS has
no effect. ADD_FCS is set by the host, and is not changed by the Am79C976
controller. This is a reserved bit in the C-LANCE (Am79C90) controller.
028
LTINT
Last Transmit Interrupt. When enabled by the LTINTEN bit (CSR5, bit 14), LTINT is
used to suppress interrupts after selected frames have been copied to the transmit
FIFO. When LTINT is cleared to 0 and ENP is set to 1, the Am79C976 controller will
not set TINT (CSR0, bit 9) after the corresponding frame has been copied to the
transmit FIFO. TINT will only be set when the last descriptor of a frame has both LTINT
and ENP set to 1. When LTINTEN is cleared to 0, the LTINT bit is ignored.
0
27-26
Reserved.
025
STP
Start of Packet indicates that this is the first buffer to be used by the Am79C976
controller for this frame. It is used for data chaining buffers. The STP bit must be set
in the first buffer of the frame, or the Am79C976 controller will skip over the descriptor
and poll the next descriptor(s) until the OWN and STP bits are set. STP is set by the
host and is not changed by the Am79C976 controller.
024
ENP
End of Packet indicates that this is the last buffer to be used by the Am79C976
controller for this frame. It is used for data chaining buffers. If both STP and ENP are
set, the frame fits into one buffer and there is no data chaining. ENP is set by the host
and is not changed by the Am79C976 controller.
0
23
Reserved.
022
KILL
This bit causes the transmission of the corresponding frame to be aborted. If the
transmitter has not started sending the frame at the time that the descriptor
processing logic encounters the KILL bit, no portion of the frame will be sent. If part
of the frame has been sent, the frame will be truncated, and an FCS field containing
the inverse of the correct CRC will be appended.
0
21-16
Reserved.
0
15-0
BCNT
Buffer Byte Count is the usable length of the buffer pointed to by this descriptor,
expressed as the two’s complement of the length of the buffer. This is the number of
bytes from this buffer that will be transmitted by the Am79C976 controller. This field is
written by the host and is not changed by the Am79C976 controller. There are no
minimum buffer size restrictions.
4
31-18
Reserved.
4
17-16
TCC[1:0]
VLAN Tag Control Command. This field contains a command that causes the
transmitter to add, modify, or delete a VLAN tag or to transmit the frame unaltered.
00 = Transmit the data in the buffer unaltered
01 = Delete the VLAN tag (the 13th through 16th bytes of the frame)
10 = Insert a VLAN tag containing the TCI field from the descriptor
11 = Replace the TCI field of the frame with TCI data from the descriptor



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