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AM79C976 Datasheet(PDF) 302 Page - Advanced Micro Devices

Part # AM79C976
Description  PCnet-PRO??10/100 Mbps PCI Ethernet Controller
PDF  309 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C976 Datasheet(HTML) 302 Page - Advanced Micro Devices

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INDEX-3
Am79C976
8/01/00
P R E L I M INARY
CSR112
Missed Frame Count . . . . . . . . . . . . . . . .193
CSR113
Reserved . . . . . . . . . . . . . . . . . . . . . . . . . .193
CSR114
Receive Collision Count . . . . . . . . . . . . .193
CSR116
OnNow Power Mode Register . . . . . . . . .194
CSR117-121
Reserved . . . . . . . . . . . . . . . . . . . . . . . . . .195
CSR12
Physical Address Register 0 . . . . . . . . . .184
CSR122
Advanced Feature Control . . . . . . . . . . . .195
CSR123
Reserved . . . . . . . . . . . . . . . . . . . . . . . . . .195
CSR124
Test Register 1 . . . . . . . . . . . . . . . . . . . . .195
CSR125
MAC Enhanced Configuration Control . .196
CSR13
Physical Address Register 1 . . . . . . . . . .185
CSR14
Physical Address Register 2 . . . . . . . . . .185
CSR15
Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . .185
CSR16-23
Reserved Locations . . . . . . . . . . . . . . . . .186
CSR2
Initialization Block Address 1 . . . . . . . . .175
CSR24
Base Address of Receive Ring Lower . . .187
CSR25
Base Address of Receive Ring Upper . . .187
CSR26-29
Reserved . . . . . . . . . . . . . . . . . . . . . . . . . .187
CSR3
Interrupt Masks and Deferral Control . . .175
CSR30
Base Address of Transmit Ring Lower . .187
CSR31
Base Address of Transmit Ring Upper . .187
CSR32-46
Reserved . . . . . . . . . . . . . . . . . . . . . . . . . .188
CSR4
Test and Features Control . . . . . . . . . . . .177
CSR47
Transmit Polling Interval . . . . . . . . . . . . .188
CSR48
Receive Poll Time Counter . . . . . . . . . . . 188
CSR49
Receive Polling Interval . . . . . . . . . . . . . 188
CSR5
Extended Control and Interrupt 1 . . . . . . 179
CSR50-57
Reserved . . . . . . . . . . . . . . . . . . . . . . . . . 189
CSR58
Software Style . . . . . . . . . . . . . . . . . . . . . 189
CSR59-75
Reserved . . . . . . . . . . . . . . . . . . . . . . . . . 191
CSR6
RX/TX Descriptor Table Length . . . . . . . 181
CSR7
Extended Control and Interrupt 2 . . . . . . 181
CSR76
Receive Ring Length . . . . . . . . . . . . . . . . 191
CSR77
Reserved . . . . . . . . . . . . . . . . . . . . . . . . . 191
CSR78
Transmit Ring Length . . . . . . . . . . . . . . . 191
CSR79
Reserved . . . . . . . . . . . . . . . . . . . . . . . . . 191
CSR8
Logical Address Filter 0 . . . . . . . . . . . . . 184
CSR80
DMA Transfer Counter and FIFO
Threshold Control . . . . . . . . . . . . . 191, 193
CSR81-87
Reserved . . . . . . . . . . . . . . . . . . . . . . . . . 193
CSR88
Chip ID Register Lower . . . . . . . . . . . . . . 193
CSR89
Chip ID Register Upper . . . . . . . . . . . . . . 193
CSR9
Logical Address Filter 1 1 . . . . . . . . . . . . 84
CSR90-99
Reserved . . . . . . . . . . . . . . . . . . . . . . . . . 193
CTRL0
Control0 Register . . . . . . . . . . . . . . . . . . . 139
CTRL1
Control1 Register . . . . . . . . . . . . . . . . . . . 140
CTRL2
Control2 Register . . . . . . . . . . . . . . . . . . . 143
CTRL3
Control3 Register . . . . . . . . . . . . . . . . . . . 144
Cycle Frame . . . . . . . . . . . . . . . . . . . . . . . . . 24



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