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HMS81032TL Datasheet(PDF) 75 Page - Hynix Semiconductor |
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HMS81032TL Datasheet(HTML) 75 Page - Hynix Semiconductor |
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75 / 77 page ![]() APPENDIX lxxvi JUNE 2001 Ver 1.00 16-BIT operation Bit Manipulation No. Mnemonic Op Code Byte No Cycle No Operation Flag NVGBHIZC 1 ADDW dp 1D 2 5 16-Bits add without Carry YA ← ( YA ) ( dp +1 ) ( dp ) NV--H-ZC 2CMPW dp 5D 2 4 Compare YA contents with memory pair contents : (YA) − (dp+1)(dp) N-----ZC 3DECW dp BD 2 6 Decrement memory pair ( dp+1)( dp) ← ( dp+1) ( dp) - 1 N-----Z- 4 INCW dp 9D 2 6 Increment memory pair ( dp+1) ( dp) ← ( dp+1) ( dp ) + 1 N-----Z- 5 LDYA dp 7D 2 5 Load YA YA ← ( dp +1 ) ( dp ) N-----Z- 6 STYA dp DD 2 5 Store YA ( dp +1 ) ( dp ) ← YA -------- 7 SUBW dp 3D 2 5 16-Bits subtract without carry YA ← ( YA ) - ( dp +1) ( dp) NV--H-ZC No. Mnemonic Op Code Byte No Cycle No Operation Flag NVGBHIZC 1 AND1 M.bit 8B 3 4 Bit AND C-flag : C ← ( C ) ∧ ( M .bit ) -------C 2 AND1B M.bit 8B 3 4 Bit AND C-flag and NOT : C ← ( C ) ∧ ~( M .bit ) -------C 3 BIT dp 0C 2 4 Bit test A with memory : MM----Z- 4 BIT !abs 1C 3 5 Z ← ( A ) ∧ ( M ) , N ← ( M7 ) , V ← ( M6 ) 5 CLR1 dp.bit y1 2 4 Clear bit : ( M.bit ) ← “0” -------- 6 CLRA1 A.bit 2B 2 2 Clear A bit : ( A.bit ) ← “0” -------- 7 CLRC 20 1 2 Clear C-flag : C ← “0” -------0 8 CLRG 40 1 2 Clear G-flag : G ← “0” --0----- 9 CLRV 80 1 2 Clear V-flag : V ← “0” -0--0--- 10 EOR1 M.bit AB 3 5 Bit exclusive-OR C-flag : C ← ( C ) ⊕ ( M .bit ) -------C 11 EOR1B M.bit AB 3 5 Bit exclusive-OR C-flag and NOT : C ← ( C ) ⊕ ~(M .bit) -------C 12 LDC M.bit CB 3 4 Load C-flag : C ← ( M .bit ) -------C 13 LDCB M.bit CB 3 4 Load C-flag with NOT : C ← ~( M .bit ) -------C 14 NOT1 M.bit 4B 3 5 Bit complement : ( M .bit ) ← ~( M .bit ) -------- 15 OR1 M.bit 6B 3 5 Bit OR C-flag : C ← ( C ) ∨ ( M .bit ) -------C 16 OR1B M.bit 6B 3 5 Bit OR C-flag and NOT : C ← ( C ) ∨ ~( M .bit ) -------C 17 SET1 dp.bit x1 2 4 Set bit : ( M.bit ) ← “1” -------- 18 SETA1 A.bit 0B 2 2 Set A bit : ( A.bit ) ← “1” -------- 19 SETC A0 1 2 Set C-flag : C ← “1” -------1 20 SETG C0 1 2 Set G-flag : G ← “1” --1----- 21 STC M.bit EB 3 6 Store C-flag : ( M .bit ) ← C -------- 22 TCLR1 !abs 5C 3 6 Test and clear bits with A : A - ( M ) , ( M ) ← ( M ) ∧ ~( A ) N-----Z- 23 TSET1 !abs 3C 3 6 Test and set bits with A : A - ( M ) , ( M ) ← ( M ) ∨ ( A ) N-----Z- |
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