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HMS81032TL Datasheet(PDF) 20 Page - Hynix Semiconductor |
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HMS81032TL Datasheet(HTML) 20 Page - Hynix Semiconductor |
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20 / 77 page ![]() HMS81004E/08E/16E/24E/32E JUNE 2001 Ver 1.00 17 used. Figure 8-3 Stack Operation Program Counter: The Program Counter is a 16-bit wide which consists of two 8-bit registers, PCH and PCL. This counter indicates the address of the next instruction to be executed. In reset state, the program counter has reset routine address (PCH:0FFH, PCL:0FEH). Program Status Word: The Program Status Word (PSW) contains several bits that reflect the current state of the CPU. The PSW is described in Figure 8-4 . It contains the Negative flag, the Overflow flag, the Break flag the Half Carry (for BCD operation), the Interrupt enable flag, the Zero flag, and the Carry flag. [Carry flag C] This flag stores any carry or borrow from the ALU of CPU after an arithmetic operation and is also changed by the Shift Instruction or Rotate Instruction. SP 01H Stack Address ( 100H ~ 1FFH ) 15 0 87 Hardware fixed Caution: The Stack Pointer must be initialized by software be- cause its value is undefined after RESET. Example: To initialize the SP LDX #0FFH TXSP ; SP ← FFH At execution of a CALL/TCALL/PCALL PCL PCH 01FF SP after execution SP before execution 01FD 01FE 01FD 01FC 01FF Push down At acceptance of interrupt PCL PCH 01FF 01FC 01FE 01FD 01FC 01FF Push down PSW At execution of RET instruction PCL PCH 01FF 01FF 01FE 01FD 01FC 01FD Pop up At execution of RETI instruction PCL PCH 01FF 01FF 01FE 01FD 01FC 01FC Pop up PSW 0100H 01FFH Stack depth At execution of PUSH instruction A 01FF 01FE 01FE 01FD 01FC 01FF Push down SP after execution SP before execution PUSH A (X,Y,PSW) At execution of POP instruction A 01FF 01FF 01FE 01FD 01FC 01FE Pop up POP A (X,Y,PSW) |
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