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HMS81032TL Datasheet(PDF) 63 Page - Hynix Semiconductor |
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HMS81032TL Datasheet(HTML) 63 Page - Hynix Semiconductor |
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63 / 77 page ![]() HMS81004E/08E/16E/24E/32E 60 JUNE 2001 Ver 1.00 16. RESET FUNCTION 16.1 EXTERNAL RESET The RESET pin should be held at low for at least 2machine cycles with the power supply voltage within the operating voltage range and must be connected 0.1uF capacitor for stable system initialization. The RESET pin contains a Schmitt trigger with an internal pull-up resistor. 16.2 POWER ON RESET Power On Reset circuit automatically detects the rise of power voltage (the rising time should be within 50ms) the power voltage reaches a certain level, RESET terminal is maintained at “L” Level until a crystal ceramic oscillator oscillates stably. After power applies and starting of oscil- lation, this reset state is maintained for about oscillation cycle of 219 (about 65.5ms : at 4MHz).The execution of built-in Power On Reset circuit is as follows : (1) Latch the pulse from Power On Detection Pulse Gener- ator circuit, and reset Prescaler, B.I.T and B.I.T Overflow detection circuit. (2) Once B.I.T Overflow detection circuit is reset. Then, Prescaler starts to count. (3) Prescaler output is inputted into B.I.T and PS10 of Prescaler output is automatically selected. If overflow of B.I.T is detected, Overflow detection circuit is set. 4) Reset circuit generates maximum period of reset pulse from Prescaler and B.I.T Figure 16-1 RESET Pin connection RESET GND 0.1uF capacitor |
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