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HMS81032TL Datasheet(PDF) 30 Page - Hynix Semiconductor |
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HMS81032TL Datasheet(HTML) 30 Page - Hynix Semiconductor |
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30 / 77 page ![]() HMS81004E/08E/16E/24E/32E JUNE 2001 Ver 1.00 27 The operation within data memory (RAM) ASL, BIT, DEC, INC, LSR, ROL, ROR Example; Addressing accesses the address 0135H regard- less of G-flag and RPR. 983501 INC !0135H ;A ←ROM[135H] (5) Indexed Addressing X indexed direct page (no offset) → → → → {X} In this mode, a address is specified by the X register. ADC, AND, CMP, EOR, LDA, OR, SBC, STA, XMA Example; X=15H, G=1, RPR=01H D4 LDA {X} ;ACC ←RAM[X]. X indexed direct page, auto increment → → → → {X}+ In this mode, a address is specified within direct page by the X register and the content of X is increased by 1. LDA, STA Example; G=0, X=35H DB LDA {X}+ X indexed direct page (8 bit offset) → → → → dp+X This address value is the second byte (Operand) of com- mand plus the data of -register. And it assigns the mem- ory in Direct page. ADC, AND, CMP, EOR, LDA, LDY, OR, SBC, STA STY, XMA, ASL, DEC, INC, LSR, ROL, ROR Example; G=0, X=0F5H C645 LDA 45H+X 98 0F100H ~ ~ ~ ~ data 135H 01 0F102H 35 0F101H data+1 → data address: 0135 data D4 115H 0E550H data → A ~ ~ ~ ~ data DB 35H data → A ~ ~ ~ ~ 36H → X data 45 3AH 0E551H data → A ~ ~ ~ ~ C6 0E550H 45H+0F5H=13AH |
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