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HMS81032TL Datasheet(PDF) 54 Page - Hynix Semiconductor

Part # HMS81032TL
Description  HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS
PDF  77 Pages
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HMS81032TL Datasheet(HTML) 54 Page - Hynix Semiconductor

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HMS81004E/08E/16E/24E/32E
JUNE 2001 Ver 1.00
51
Figure 14-4 Timing chart of Interrupt Acceptance and Interrupt Return Instruction
A interrupt request is not accepted until the I-flag is set to “1”
even if a requested interrupt has higher priority than that of the
current interrupt being serviced.
When nested interrupt service is required, the I-flag should be set
to “1” by “EI” instruction in the interrupt service program. In this
case, acceptable interrupt sources are selectively enabled by the
individual interrupt enable flags.
Saving/Restoring General-purpose Register
During interrupt acceptance processing, the program counter and
the program status word are automatically saved on the stack, but
accumulator and other registers are not saved itself. These regis-
ters are saved by the software if necessary. Also, when multiple
interrupt services are nested, it is necessary to avoid using the
same data memory area for saving registers.
The following method is used to save/restore the general-purpose
registers.
Example: Register save using push and pop instructions
General-purpose register save/restore using push and pop instruc-
tions;
V.L.
System clock
Address Bus
PC
SP
SP-1
SP-2
V.H.
New PC
V.L.
Data Bus
Not used
PCH
PCL
PSW
ADL
OP code
ADH
Instruction Fetch
Internal Read
Internal Write
Interrupt Processing Step
Interrupt Service Task
V.L. and V.H. are vector addresses.
ADL and ADH are start addresses of interrupt service routine as vector contents.
External Interrupt1
012H
0E3H
0FFF8H
0FFF9H
0EH
2EH
0E312H
0E313H
Entry Address
Correspondence between vector table address for Exteranl Interrupt1
and the entry address of the interrupt service program.
Vector Table Address
INTxx:
PUSH
A
PUSH
X
PUSH
Y
;SAVE ACC.
;SAVE X REG.
;SAVE Y REG.
interrupt processing
POP
Y
POP
X
POP
A
RETI
;RESTORE Y REG.
;RESTORE X REG.
;RESTORE ACC.
;RETURN
main task
interrupt
service task
saving
registers
restoring
registers
acceptance of
interrupt
interrupt return



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