HMS81032TL datasheet(55/77 Pages) HYNIX

55 / 77 page

HMS81004E/08E/16E/24E/32E

JUNE 2001 Ver 1.00

14.5 BRK Interrupt

Software interrupt can be invoked by BRK instruction, which has

the lowest priority order.

Interrupt vector address of BRK is shared with the vector of

TCALL 0 (Refer to Program Memory Section). When BRK inter-

rupt is generated, B-flag of PSW is set to distinguish BRK from

TCALL 0.

Each processing step is determined by B-flag as shown in Figure

14-5

Figure 14-5 Execution of BRK/TCALL0

14.6 Multi Interrupt

If two requests of different priority levels are received simulta-

neously, the request of higher priority level is serviced. If re-

quest s of the i nt err upt are recei ved at t he same ti me

simultaneously, an internal polling sequence determines by hard-

ware which request is serviced.

However, multiple processing through software for special fea-

tures is possible. Generally when an interrupt is accepted, the I-

flag is cleared to disable any further interrupt. But as user sets I-

flag in interrupt routine, some further interrupt can be serviced

even if certain interrupt is in progress.

Example: During Timer1 interrupt is in progress, INT1 interrupt

serviced without any suspend.

TIMER1:

PUSH

LDM

IENH,#40H

;

Enable INT1 only

LDM

IENL,#00H

;

Disable other

;

Enable Interrupt

LDM

IENH,#0FFH

;

Enable all interrupts

LDM

IENL,#0FFH

POP

RETI

Figure 14-6 Execution of Multi Interrupt

14.7 External Interrupt

The external interrupt on INT1 and INT2 pins are edge triggered

depending on the edge selection register IEDS (address 0D8H) as

shown in Figure14-7.

B-FLAG

BRK

INTERRUPT

ROUTINE

RETI

TCALL0

ROUTINE

RET

BRK or

TCALL0

enable INT1

TIMER 1

service

INT1

service

Main Program

service

Occur

TIMER1 interrupt

Occur

INT1

disable other

enable INT1

enable other

In this example, the INT1 interrupt can be serviced without any

pending, even TIMER1 is in progress.

Because of re-setting the interrupt enable registers IENH,IENL

and master enable “EI” in the TIMER1 routine.

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