HMS81032TL datasheet(44/77 Pages) HYNIX

44 / 77 page

HMS81004E/08E/16E/24E/32E

JUNE 2001 Ver 1.00

Figure 13-2 Block Diagram of Timer0

BTC L

6543

210

T0CN

T0IFS

INITIAL VALUE: 00H

ADDRESS: 0D0H

TM0

T0SL2

T 0SL1 T0SL0

R/W

T0M O D

Timer 0 mode register

Timer0 input clock select (fex=4Mhz)

0: Modulo-N

1: Single Mode

0: Interrupt Every Count Overflow

1: Interrupt Every 2nd Count Overflow

Timer0 Single/Moudol-N select

Timer0 Interrupt select

0: Count Pause

1: Count Continuation

Timer0 Counter Continuation/Pause Control

0: Timer/Counter

1: Input capture (PS1:not supporting

Timer0 Interrupt select

0: Timer0 Stop

1: Tiemr0 Start after clear

Timer0 Start/Stop control

R/W

C AP0

T0ST

input cature)

000: PS0 250ns

001: PS1 500ns

010: PS2 1us

011: PS3 2us

100: PS4 4us

101: PS5 8us

110: PS11 512us

111: EC

T 0 S L [2 :0 ]

MU X

000

001

010

PS 4

PS 5

PS 11

011

100

101

110

111

E dge D e te ctor

EC PIN

IFINT2

INT2

INTERRUPT

capture

IEDS[5:4]

Comparator

INT2/R12 PIN

clear

T0HC

T0LC

T0 COUNTER (16-bit)

[0D5H][0D6H]

16 BITS

MSB

LSB

PS 3

PS 2

PS 1

PS 0

T0MOD T0CN

T0ST

delay

clear

CAP0

MUX(16-bit)

T0HMD

T0HLD

T0LMD

T0LLD

[0D3H][0D4H]

[0D5H][0D6H]

CAP0

OUTPUT

GEN.

Interrupt

GEN.

T0INIT

T0OUT

T0IFS

IFT0

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