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UM0434 Datasheet(PDF) 347 Page - STMicroelectronics

Part # UM0434
Description  The primary objective of this user?셲 manual is to describe
PDF  390 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UM0434 Datasheet(HTML) 347 Page - STMicroelectronics

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Nexus3 module
UM0434
348/391
12.5
Nexus3 register access through JTAG/OnCE
Access to Nexus3 register resources is enabled by loading a single instruction, NEXUS3-
Access, into the JTAG instruction register/OnCE OCMD register. For the Nexus3 block, the
OCMD value is 0b00_0111_1100.
Once the NEXUS3-Access instruction has been loaded, the JTAG/OnCE port allows
tool/target communications with all Nexus3 registers according to the register map in
Table 216.
Reading/writing of a Nexus3 register then requires two passes through the data-scan path
of the JTAG state machine 12 (see
Chapter 12.15: IEEE 1149.1 (JTAG) RD/WR sequences
on page 379”).
1.
The first pass through the DR selects the Nexus3 register to be accessed by providing
an index (see
Table 216), and the direction, read/write. This is achieved by loading an
8-bit value into the JTAG data register (DR). This register has the format shown in
Table 241.
2.
The second pass through the DR then shifts the data in or out of the JTAG port, least
significant bit first.
a)
During a read access, data is latched from the selected Nexus register when the
JTAG state machine passes through the capture-DR state.
b)
During a write access, data is latched into the selected Nexus register when the
JTAG state machine passes through the update-DR state.
12.6
Ownership trace
This section details the ownership trace features of the Nexus3 module.
12.6.1
Overview
Ownership trace provides a macroscopic view, such as task flow reconstruction, when
debugging software is written in a high-level or object-oriented language. It offers the
highest level of abstraction for tracking operating system software execution. This is
especially useful when the developer is not interested in debugging at lower levels.
Table 241.
Nexus3 Register Access through JTAG/OnCE (Example)
(7 bits)
(1 bit)
Nexus Register Index
R/W
Reset Value: 0x00
Table 242.
Nexus register example
Field
Description
Nexus Register Index
Selected from values in
Table 216
Read/write (R/W)
0 Read
1 Write



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