UM0434 datasheet(349/390 Pages) STMICROELECTRONICS

349 / 390 page

Nexus3 module

UM0434

350/391

Note:

DC1[OVC] can be set to delay the CPU in order to alleviate, but not eliminate, potential

overrun situations.

Error information is messaged out in the format shown in

Table 244.

12.6.4

OTM flow

Ownership trace messages are generated when the operating system writes to the e200z3

process ID register (PID0) or the memory-mapped ownership trace register (OTR).

The following flow describes the OTM process:

●

The process ID register is a system control register. It is internal to the core processor

and can be accessed by using PPC instructions. The contents of this register are

replicated on the pins of the processor and connected to Nexus.

●

Writes to the e200z3 internal process ID register will pulse a write signal to Nexus. The

data value written into the process ID register is latched and formed into the ownership

trace message that is queued to be transmitted.

●

Process ID register reads do not cause ownership trace messages to be transmitted by

the Nexus 3 module.

12.7

Program trace

This section details the program trace mechanism supported by Nexus3 for the e200z3

processor. Program trace is implemented using branch trace messaging (BTM) as required

by the class 3

IEEE-ISTO 5001-2003 standard definition. Branch trace messaging for

e200z3 processors is accomplished by snooping the e200z3 virtual address bus, between

the CPU and MMU, attribute signals, and CPU status

p_pstat[0:5].

12.7.1

Branch trace messaging (BTM)

Traditional branch trace messaging facilitates program trace by providing the following types

of information:

●

Messaging for taken direct branches includes how many sequential instructions were

executed since the last taken branch or exception. Direct or indirect branches not taken

are counted as sequential instructions.

●

Messaging for taken indirect branches and exceptions includes how many sequential

instructions were executed since the last taken branch or exception and the unique

portion of the branch target address or exception vector address.

Branch history messaging facilitates program trace by providing the following information:

●

Messaging for taken indirect branches and exceptions includes how many sequential

instructions were executed since the last predicate instruction, taken indirect branch, or

exception, the unique portion of the branch target address or exception vector address,

and a branch/predicate instruction history field. Each bit in the history field represents a

direct branch or predicated instruction where a value of one indicates taken and a value

Table 244.

Error message format

(5 bits)

(4 bits)

(6 its)

Error Code (00000, 00111, or 01000)

Source Process

TCODE (001000)

Fixed Length = 15 bits

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