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TAS5548DCAR Datasheet(PDF) 102 Page - Texas Instruments |
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TAS5548DCAR Datasheet(HTML) 102 Page - Texas Instruments |
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102 / 116 page  TAS5548 SLES270A – NOVEMBER 2012 – REVISED APRIL 2015 www.ti.com 8.3 Do’s and Don’ts 8.3.1 Frequency Scaling AM Avoidance The AM avoidance strategy exploits the presence of the ASRC. The APLL output frequency is directly varied by varying the multiplier ratio in the PLL loop. The dividers to generate clocks from the APLL are fixed at their nominal division factor, so the result is that the internal sampling rate is changing accordingly. The ASRC will adapt with this changing output rate (the internal sampling rate) and convert the incoming sampling rates to this rate accordingly. The rest of the circuit does not change and operates normally, but since the APLL output frequency is varied while the clock dividers are fixed, the PWM carrier frequency becomes varied also, which is the goal of this AM avoidance strategy. This shift in processing rate will effect time-domain digital processing, such as the EQ's and DRC's decay values by the value in Freq_Error below. Table 86. APLL/DAP/ASRC Clock Frequencies with New AM Avoidance Strategy Feedbac # cycles Mode Input FS XTLA Prescale DCLK Internal SR DAP CLK ASRC CLK PWM rate Freq_Error k per FS Normal 8 - 192k 12288 4 64 196608 96 131072 1365.33 98304 384 0.00% AM#1 8 - 192k 12288 4 62 190464 93 126976 1365.33 95232 372 -3.13% AM#2 8 - 192k 12288 4 60 184320 90 12288 1365.33 92160 360 -6.25% AM#3 8 - 192k 12288 4 58 178176 87 118784 1365.33 89088 348 -9.38% AM#4 8 - 192k 12288 4 56 172032 84 114688 1365.33 86016 336 -12.50% 8.4 Initialization Set Up 8.4.1 Startup Register Writes to get Audio Functioning By default, the device starts up with its outputs muted. The following writes should be used to bring it out of standby: TAS5548 1. Exit Shutdown 0x03 = A0 2. Set Master Volume 0xD9 = 00 00 00 48 102 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TAS5548 |
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