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Z80 Datasheet(PDF) 138 Page - Zilog, Inc. |
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Z80 Datasheet(HTML) 138 Page - Zilog, Inc. |
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138 / 330 page  <%27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Direct Memory Access Port Designation Either Port A or Port B can be selected as the source or destination, (illus- trated in Figure 19) because both ports feature the same degree of program- mability. When the destination port is also a fixed-address port, see the section “Fixed-Address Destination Ports.” Port characteristics are spec- ified in the following control byte groups: In a transfer, if the direction of transfer (bit 2 of WR0) changes, the WR0 control byte must be preceded by a different control byte, thereby insuring that the DMA is disabled. REINITIALIZE STATUS BYTE Command 1 READ MASK FOLLOWS Command 1 Read Mask Control Byte 1 INITIATE READ SEQUENCE Command 1 FORCE READY Command 1 ENABLE INTERRUPTS Command 1 ENABLE DMA Command 1 Total 35 Port A Port B WR0 WR0 WR1 WR2 WR6 WR4 WR6 Table 15. Control Byte Order (Continued) Initialization/Reinitialization Sequence Maximum Number of Z80 CPU Bytes |
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