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Z80 Datasheet(PDF) 142 Page - Zilog, Inc. |
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Z80 Datasheet(HTML) 142 Page - Zilog, Inc. |
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142 / 330 page  <%27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Direct Memory Access processed until the bus is released). Second, to enable the DMA, the ENABLE AFTER RETI command must be used in the service routine after an Interrupt on Ready. The typical purpose of interrupting when the Ready line comes active is to allow the CPU time to determine where a transfer should go, which it does in the service routine. This often occurs in systems with dynamic memory allocation and it improves the efficiency with which memory can be allocated. For example, the CPU might write and load new starting addresses for a memory destination to the DMA in the service routine. Only at the end of the service routine is the DMA enabled to request the bus. The ENABLE AFTER RETI command, which must precede the ENABLE DMA command, resets a latch that is set when the Interrupt on Ready first occurred. For non-Z80 CPU environments, the DISABLE INTERRUPTS, ENABLE INTERRUPTS ,and RESET AND DISABLE INTERRUPTS commands are available. They can simulate the Z80 CPU’s interrupt-acknowledge cycle and return-from-interrupt instruction, both of which the DMA needs to perform and return from interrupts. Byte Matching (Searches) In stopping, or stopping and interrupting on match (WR3, WR4), to perform additional operations with the DMA, the following sequence of commands are written: 1. LOAD or CONTINUE. 2. REINITIALIZE STATUS BYTE. 3. ENABLE DMA. Another command (with the exception of ENABLE DMA) must precede the REINITIALIZE STATUS BYTE command. Table 11 on page 76 describes the contents of various counters when stopping on byte match. |
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