 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
Z80 Datasheet(PDF) 179 Page - Zilog, Inc. |
|
|
|||||||||||||||||||||||||||||
Z80 Datasheet(HTML) 179 Page - Zilog, Inc. |
|
|
179 / 330 page  < %27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Direct Memory Access Figure 66. Bus Release in Byte Mode The next bus request for the next byte comes after both BUSREQ and BAI have returned High. In a Z80 environment, BAI returns High one clock cycle after BUSREQ returns High. Bus Release on End-of-Block. When the DMA is programmed to stop on end-of-block in Burst or Contin- uous modes, an end-of-block causes BUSREQ to go High (inactive) on the same rising edge of CLK in which the DMA completes the data block transfer (see Figure 67). The last byte in the block is transferred even if RDY goes inactive before completion of the last byte operation. Figure 67. Bus Release on End-of-Block (Burst and Continuous Modes) BUSREQ DMA Active BAI CLK DMA Inactive BUSREQ RDY Current Byte Operation DMA Inactive Active Inactive |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
