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Z80 Datasheet(PDF) 220 Page - Zilog, Inc. |
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Z80 Datasheet(HTML) 220 Page - Zilog, Inc. |
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220 / 330 page  <%27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Parallel Input/Output If more than four PIO devices must be accommodated, a look-ahead struc- ture may be used as shown in Figure 14. With this technique, more than thirty PIOs may be chained together using standard TTL logic. Figure 14. A Method of Extending the Interrupt Priority Daisy-Chain I/O Device Interface In this example, the Z80 PIO is connected to an I/O terminal device, which communicates over an 8-bit parallel bidirectional data bus as illustrated in Figure 15. Mode 2 operation (bidirectional) is selected by sending the following control word to Port A: Next, the appropriate interrupt vector is loaded (refer to Z80 CPU User’s Manual for details on the operation of the interrupt). Z80 CPU IEO IEI IEO IEI IEO IEI IEO IEI Data Bus +V PI0 PI0 PI0 PI0 IEO IEI IEO IEI IEO IEI IEO IEI PI0 PI0 PI0 PI0 Mode Control XX D7 D6 D5 D4 D3 D0 D2 D1 11 11 10 |
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