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Z80 Datasheet(PDF) 327 Page - Zilog, Inc. |
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Z80 Datasheet(HTML) 327 Page - Zilog, Inc. |
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327 / 330 page  Z80 CPU Peripherals User Manual UM008101-0601 Serial Input/Output 307 Figure 130. Interrupt Acknowledge Cycle Timing Return From Interrupt Cycle Normally, the Z80 CPU issues a RETI, RETurn from Interrupt, instruction at the end of an interrupt service routine. The RETI is a 2-byte Op Code, ED-4D, which resets the interrupt-underservice latch that terminates the interrupt just processed. This is accomplished by manipulating the daisy- chaininthe followingway. The normal daisy-chain operation can detect a pending interrupt; however, it cannot distinguish between an interrupt under service and a pending unacknowledged interrupt of a higher priority. Whenever ED is decoded, the daisy-chain is modified by forcing High the IEO of any interrupt not yet acknowledged. Thus the daisy-chain identifies the device presently under service as the only one with an IEI High and an IEO Low. If the next Op Code byte is 4D, the interrupt-underservice latch is reset. See Figure 131. T1 Φ IORQ RD M1 Data T2 TW T3 T4 IEI Vector TW |
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