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DP83256 Datasheet(PDF) 86 Page - National Semiconductor (TI) |
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DP83256 Datasheet(HTML) 86 Page - National Semiconductor (TI) |
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86 / 144 page  50 Registers (Continued) 542 ALTERNATE PMD REGISTER (APMDREG) This register is used to enable or disable the Alternate PMD inputs and ouputs These signals are not required for use in FDDI board implementations that do not require a scrambler that is external to the PLAYERa device The actual interface consists of the signal pairs RXC OUT RXD OUT RXC IN and RXD IN The interface is disabled by default and should only be enabled if it is being used Note that Long Internal Loopback should not be used when the Alternate PMD Interface is enabled DO NOT WRITE TO RESERVED REGISTER BITS Writes to reserved register bits could prevent proper device operation Therefore read the register first and then write it back with the non-reserved bits set to the desired value Note The Alternate PMD Interface pins are only available on the 100-pin DP83256-AP and 160-pin DP83257 PLAYERa devices The Alternate PMD Interface is disabled on reset ACCESS RULES ADDRESS READ WRITE 3Ch Always Always D7 D6 D5 D4 D3 D2 D1 D0 RES RES RES RES APMDEN RES RES RES Bit Symbol Description D0 – D2 RES RESERVED BITS DO NOT CHANGE THE VALUE OF THESE BITS Changes to reserved register bits could prevent proper device operation D3 APMDEN ALTERNATE PMD ENABLE When bit is set to 1 the Alternate PMD Interface is enabled When this bit is reset to 0 the Alternate PMD Interface is disabled The Alternate PMD Interface consists of the following extra ECL signal pairs RXC OUT RXD OUT RXC IN and RXD IN In some alternate PMD implementations it may also be necessary to use the 125 MHz Transmit Clock signals (TXC) The TXC outputs must be separately enabled by the TXCE bit in the CGMREG register Note The Alternate PMD Interface pins are only available on the 100-pin DP83256-AP and 160-pin DP83257 PLAYERa devices The Alternate PMD Interface is disabled on reset D4 – D7 RES RESERVED BITS DO NOT CHANGE THE VALUE OF THESE BITS Changes to reserved register bits could prevent proper device operation 86 |
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