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AT94K Datasheet(PDF) 33 Page - ATMEL Corporation |
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AT94K Datasheet(HTML) 33 Page - ATMEL Corporation |
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33 / 192 page  33 AT94K Series FPSLIC Rev. 1138F–FPSLI–06/02 SCR56 0 = Disable XTAL Pin (Rfeedback) 1 = Enable XTAL Pin (Rfeedback) SCR57 0 = Disable TOSC2 Pin (R feedback) 1 = Enable TOSC2 Pin (R feedback) SCR58 - SCR59 Reserved SCR60 - SCR61 SCR61 = 0, SCR60 = 0 “1” SCR61 = 0, SCR60 = 1 AVR System Clock SCR61 = 1, SCR60 = 0 Timer Oscillator Clock (TOSC1) (1) SCR61 = 1, SCR60 = 1 Watchdog Clock Global Clock 6 mux select (set by using the AT94K Device Options in System Designer). Note: 1. The AS2 bit must be set in the ASSR register. SCR62 0 = Disable CacheLogic Writes to FPGA by AVR 1 = Enable CacheLogic Writes to FPGA by AVR SCR63 0 = Disable Access (Read and Write) to SRAM by FPGA 1 = Enable Access (Read and Write) to SRAM by FPGA Table 10. FPSLIC System Control Register Bit Description |
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