AT94K datasheet(49/192 Pages) ATMEL

49 / 192 page

AT94K Series FPSLIC

Rev. 1138F–FPSLI–06/02

Figure 32. Memory-mapped I/O

For single-cycle access (In/Out Commands) to I/O, the instruction has to be less than 16 bits:

In the data SRAM, the registers are located at memory addresses $00 - $1F and the I/O space

is located at memory addresses $20 - $5F.

As there are only 6 bits available to refer to the I/O space, the address is shifted down 2 bits.

This means the In/Out commands access $00 to $3F which goes directly to the I/O and maps

to $20 to $5F in SRAM. All other instructions access the I/O space through the $20 - $5F

addressing.

For compatibility with future devices, reserved bits should be written zero if accessed.

Reserved I/O memory addresses should never be written.

The status flags are cleared by writing a logic 1 to them. Note that the CBI and SBI instructions

will operate on all bits in the I/O register, writing a one back into any flag read as set, thus

clearing the flag. The CBI and SBI instructions work with registers $00 to $1F only.

opcode

address

5bits

r0 - 31 ($1F)

5bits

r0 - 63 ($3F)

6bits

$00

$1F

$5F

SRAM Space

I/O Space

$00

$3F

Memory-mapped

I/O

Registers r0 - r31

Used for In/Out

Instructions

Used for all

Other Instructions

AT94K Datasheet(PDF) 49 Page - ATMEL Corporation