AT94K datasheet(62/192 Pages) ATMEL

Part #	AT94K

Description	5K - 40K Gates of AT40K FPGA with 8-bit Microcontroller, up to 36K Bytes of SRAM and On-chip JTAG ICE

PDF	192 Pages

Scroll/Zoom	100%

Manufacturer	ATMEL [ATMEL Corporation]

Direct Link	http://www.atmel.com

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62 / 192 page

AT94K Series FPSLIC

Rev. 1138F–FPSLI–06/02

Note:

1. The Power-on Reset will not work unless the supply voltage has been below VPOT (falling).

Power-on Reset

A Power-on Reset (POR) circuit ensures that the device is reset from power-on. As shown in

Figure 35, an internal timer clocked from the Watchdog Timer oscillator prevents the MCU

from starting until after a certain period after VCC has reached the Power-on Threshold voltage

– VPOT, regardless of the VCC rise time (see Figure 36 and Figure 37).

Figure 36. MCU Start-up, RESET Tied to VCC

Figure 37. Watchdog Reset during Operation

Table 15. Reset Characteristics (VCC =3.3V)

Symbol

Parameter

Minimum

Typical

Maximum

Units

POT(1)

Power-on Reset Threshold

(Rising)

1.0

1.4

1.8

Power-on Reset Threshold

(Falling)

0.4

0.6

0.8

RST

RESET Pin Threshold

Voltage

CC/2

TTOUT

Reset Delay Time-out Period

CPU

cycles

0.4

3.2

12.8

0.5

4.0

16.0

0.6

4.8

19.2

VCC

RESET

TIME-OUT

INTERNAL RESET

tTOUT

VPOT

VRST

RESET (HIGH)

RESET TIME-OUT

INTERNAL RESET

WDT TIME-OUT

tTOUT

1 XTAL CYCLE

VCC (HIGH)

AT94K Datasheet(PDF) 62 Page - ATMEL Corporation

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