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PC87591L Datasheet(PDF) 293 Page - National Semiconductor (TI) |
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PC87591L Datasheet(HTML) 293 Page - National Semiconductor (TI) |
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293 / 437 page ![]() 5.0 Host Controller Interface Modules (Continued) Revision 1.07 293 www.national.com Host Interface PM n Data In Buffer (HIPMnDI) The HIPMnDI register allows the core firmware to read the PM port DBBIN register while clearing the PM port IBF bit in the Status register. If the core interrupt on IBF for the PM channel is enabled, reading from HIPMnDI de-asserts it (low). Location: Channel 1 - 00 FEB016 Channel 2 - 00 FED216 Type: RO Host Interface PM n Data In Buffer with SCI (HIPMnDIC) The HIPMnDIC has the same function as the HIPMnDI register. In addition, it generates an SCI interrupt when IBF is cleared and when hardware SCI generation is enabled. Location: Channel 1 - 00 FEB616 Channel 2 - 00 FEC816 Type: RO Bit 76543210 Name PM Channel DBBIN Data Bit Description 7-0 PM Channel DBBIN Data. Bit 76543210 Name PM Channel DBBIN Data Bit Description 7-0 PM Channel DBBIN Data. |
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