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3.16

Peripheral Registers

TMS320VC5502

Fixed-Point Digital Signal Processor

SPRS166H – APRIL 2001 – REVISED NOVEMBER 2004

Each 5502 device has a set of peripheral memory-mapped registers as listed in Table 3-57 through

Table 3-76. Peripheral registers are accessed using the port qualifier. For more information on the use of

the port qualifier, see the TMS320C55x Assembly Language Tools User’s Guide (literature number

SPRU280). Some registers use less than 16 bits. When reading these registers, unused bits are always

read as 0.

The user guides for each peripheral contain detailed information on the operation and the functions of

each of the peripheral registers (see Section 4.2, Documentation Support, for a list of documents

supporting each peripheral).

Table 3-57. Peripheral Bus Controller Configuration Registers

WORD ADDRESS

DESCRIPTION

RESET VALUE(1)

0x0000

Reserved

0x0001

ICR

Idle Configuration Register

0000 0000 0000 0000

0x0002

ISTR

Idle Status Register

0000 0000 0000 0000

0x0003 to 0x000E

Reserved

0x000F

BOOT_MOD

Boot Mode Register (read only)

Value of GPIO[2:0] at reset

0x0010

Reserved

0x0011

Reserved

0x0100

XCR

XPORT Configuration Register

1000 0000 0000 0000

0x0102

XERR

XPORT Bus Error Register

0000 0000 0000 0000

0x0200

DCR

DPORT Configuration Register

0000 0000 0000 0000

0x0202

DERR

DPORT Bus Error Register

0000 0000 0000 0000

0x0302

IERR

IPORT Bus Error Register

0000 0000 0000 0000

0x07FD

CONFIG

System Configuration Register

1000 0010 0000 0000

0x9000

TOCR

Time-Out Control Register

0000 0000 0000 0001

(1)

x denotes a "don't care."

Table 3-58. External Memory Interface Registers

WORD ADDRESS

DESCRIPTION

RESET VALUE(1)

0x0800

EGCR1

EMIF Global Control Register 1

0010 0111 0111 1100

0x0801

EGCR2

EMIF Global Control Register 2

0000 0000 0000 1001

0x0802

CE1_1

EMIF CE1 Space Control Register 1

1111 1111 0001 1111

0x0803

CE1_2

EMIF CE1 Space Control Register 2

1111 1111 1111 1111

0x0804

CE0_1

EMIF CE0 Space Control Register 1

1111 1111 0000 0011

0x0805

CE0_2

EMIF CE0 Space Control Register 2

1111 1111 1111 1111

0x0806

Reserved

0x0807

Reserved

0x0808

CE2_1

EMIF CE2 Space Control Register 1

1111 1111 1111 0011

0x0809

CE2_2

EMIF CE2 Space Control Register 2

1111 1111 1111 1111

0x080A

CE3_1

EMIF CE3 Space Control Register 1

1111 1111 1111 0011

0x080B

CE3_2

EMIF CE3 Space Control Register 2

1111 1111 1111 1111

0x080C

SDC1

EMIF SDRAM Control Register 1

1111 0000 0000 0000

0x080D

SDC2

EMIF SDRAM Control Register 2

0000 0011 0100 1000

(1)

x denotes a "don't care."

Functional Overview

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