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MCP19124 Datasheet(PDF) 187 Page - Microchip Technology

Part # MCP19124
Description  Digitally-Enhanced Power Analog Synchronous Low-Side Dual-Loop PWM Controller
PDF  236 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP19124 Datasheet(HTML) 187 Page - Microchip Technology

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 2016 Microchip Technology Inc.
DS20005619A-page 187
MCP19124/5
28.5.13.1
Bus Collision During a Start
Condition
During a Start condition, a bus collision occurs if:
a) SDA or SCL are sampled low at the beginning of
the Start condition (Figure 28-25).
b) SCL is sampled low before SDA is asserted low
(Figure 28-26).
During a Start condition, both the SDA and the SCL
pins are monitored.
If the SDA pin is already low or the SCL pin is already
low, all of the following occur:
• The Start condition is aborted.
• The BCLIF flag is set.
• The MSSP module is reset to its Idle state
(Figure 28-25).
The Start condition begins with the SDA and SCL pins
deasserted. When the SDA pin is sampled high, the
Baud Rate Generator is loaded and counts down. If the
SCL pin is sampled low while SDA is high, a bus
collision occurs because it is assumed that another
master is attempting to drive a data ‘1’ during the Start
condition.
If the SDA pin is sampled low during this count, the
BRG is reset and the SDA line is asserted early
(Figure 28-27). If, however, a ‘1’ is sampled on the SDA
pin, the SDA pin is asserted low at the end of the BRG
count. The Baud Rate Generator is then reloaded and
counts down to zero; if the SCL pin is sampled as ‘0’
during this time, a bus collision does not occur. At the
end of the BRG count, the SCL pin is asserted low.
FIGURE 28-25:
BUS COLLISION DURING A START CONDITION (SDA ONLY)
Note:
The reason why bus collision is not a
factor during a Start condition is that no
two bus masters can assert a Start
condition at the exact same time.
Therefore, one master will always assert
SDA before the other. This condition does
not cause a bus collision because the two
masters must be allowed to arbitrate the
first address following the Start condition.
If the address is the same, arbitration
must be allowed to continue into the data
portion,
Repeated
Start
or
Stop
conditions.
SDA
SCL
SEN
BCLIF
S
SSPIF
SDA goes low before the SEN bit is set.
Set BCLIF,
S bit and SSPIF set because
SDA = 0, SCL = 1.
Set SEN, enable Start condition
if SDA = 1, SCL = 1
SEN cleared automatically because of bus
collision.
SSP module reset into Idle state.
SDA sampled low before Start condition.
Set BCLIF. S bit and SSPIF set because
SDA = 0, SCL = 1.
SSPIF and BCLIF
are cleared by software
SSPIF and BCLIF
are cleared by software



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