PM6344 datasheet(164/256 Pages) PMC

164 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

151

Bit

Type

Function

Default

Bit 7

R/W

D[7]

Bit 6

R/W

D[6]

Bit 5

R/W

D[5]

Bit 4

R/W

D[4]

Bit 3

R/W

D[3]

Bit 2

R/W

D[2]

Bit 1

R/W

D[1]

Bit 0

R/W

D[0]

In the case of an indirect write, the Indirect Data Register holds the value that will

be written to the desired register when a write is initiated via the Timeslot Indirect

Address Register. In the case of an indirect read, the Indirect Data Register will

hold the contents of the indirectly addressed register, when the read has been

completed. Please refer below to the per-timeslot register descriptions for the

expected bit formats.

The signaling and per-timeslot functions are allocated within the registers as

follows:

21H

Signaling Data Register for Time Slot 1

22H

Signaling Data Register for Time Slot 2

••

2FH

Signaling Data Register for Time Slot 15

31H

Signaling Data Register for Time Slot 17

••

3EH

Signaling Data Register for Time Slot 30

PM6344 Datasheet(PDF) 164 Page - PMC-Sierra, Inc

PM6344 Datasheet(HTML) 164 Page - PMC-Sierra, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL